Results 11 to 20 of about 1,068,233 (202)

Selective harmonic elimination pulse width modulation based hybrid multilevel inverter topology with reduced components

open access: yesIET Power Electronics, EarlyView., 2022
Abstract In this paper, a reduced switch count single‐phase hybrid multilevel inverter (MLI) is presented. Level generation unit (LGU) and polarity changing unit (PCU) are the two parts of the presented topology which are connected in series. Other advantages of the proposed topology include the reduced switch count, higher level generation with ...
Mohammad Wasiq   +6 more
wiley   +1 more source

Power quality enhancement in asymmetrical cascaded multilevel inverter using modified carrier level shifted pulse width modulation approach

open access: yesIET Power Electronics, EarlyView., 2022
New modified carrier‐based level shifted pulse width modulation approaches for single‐phase trinary dc source fed cascaded H‐bridge inverters are proposed in this article. In order to suppress the lower order harmonics, the carrier frequency is often tuned higher. However, switching and electromagnetic interference problems have a significant influence
Arun Vijayakumar   +4 more
wiley   +1 more source

A nine‐level T‐type inverter (9L‐TTI) with voltage boost capability

open access: yesIET Power Electronics, EarlyView., 2023
A new multi‐level inverter topology with boosting feature considering the reduced switch count has been presented, compared and validated. Abstract This paper introduces a 9L T‐type boost inverter (9L‐TTI) based multilevel topology, which generates a nine‐level output voltage in the boost mode.
Zarren Firdous   +5 more
wiley   +1 more source

Dual source novel nine level inverter (DSN2LI) design with minimum active devices and inherent polarity generation

open access: yesIET Power Electronics, EarlyView., 2023
This article presents a dual‐source novel nine‐level inverter (DSN2LI) featuring minimal devices. Utilizing eight switches, which include 2 bidirectional switching devices and 2 uneven dc links, the proposed DSN2LI generates nine levels. The DSN2LI employs the utilization of trinary geometric DC links.
Arun Vijayakumar   +3 more
wiley   +1 more source

Machine learning based model predictive control for grid connected enhanced switched capacitor cross‐connected switched multi‐level inverter (ESC3SMLI)

open access: yesIET Power Electronics, EarlyView., 2023
This article describes an enhanced switched capacitor cross‐connected switched multilevel inverter (ESC3SMLI) with machine learning‐based model‐predictive control (ML‐MPCM). An improved switched capacitor cross connected switched multilevel inverter featuring minimal devices are presented. The proposed ESC3SMLI produces nine levels using eight switches,
Arun Vijayakumar   +4 more
wiley   +1 more source

An assessment of H‐bridge less grid‐tied multilevel inverter with minimum device count and lesser total standing voltage

open access: yesIET Power Electronics, EarlyView., 2023
An innovative switched‐capacitor‐based inverter is proposed in this article. The suggested converter can produce a five‐level output voltage by utilizing minimal components (single dc source, six switches, and one capacitor). The effectiveness of the suggested inverter is verified by experimental results using hardware in loop OPAL‐RT OP4510.
Tamiru Debela   +2 more
wiley   +1 more source

Installation and Performance Evaluation of the DSpace

open access: yesСовременные информационные технологии и IT-образование, 2023
The article discusses cutting-edge open source software, DSpace, designed to create modern open digital libraries and repositories in academic and other organizations. This software is supported by a large community of developers and enthusiasts from all
Irina Filozova   +5 more
doaj   +1 more source

Harmonic elimination of a fifteen‐level inverter with reduced number of switches using genetic algorithm

open access: yesIET Power Electronics, EarlyView., 2023
This article presents a Fifteen‐level inverter topology that has a lesser number of switches (12) and can accommodate isolated DC sources. The total harmonic elimination (THD) of the proposed topology using genetic algorithm is within the IEEE 519 standards. Further, the fifteen‐level inverter is implemented in Hardware and firing pulses were generated
Yogesh Joshi   +4 more
wiley   +1 more source

Análisis de estrategias de actualización de repositorios digitales a DSpace 7

open access: yesAnales de Documentación, 2023
En este trabajo se analizan distintas estrategias que se pueden aplicar a la hora de actualizar un repositorio digital desde DSpace 6 o anterior hacia DSpace 7.
Pablo de Albuquerque   +4 more
doaj   +1 more source

Software DSpace

open access: yesConci, 2020
Investigação que visa elencar características básicas que compõem o pacote de software DSpace no contexto dos repositórios institucionais. Pontua temas essenciais para a pesquisa, sendo: comunicação científica, Iniciativa de Arquivos Abertos, Movimento ...
Marilete da Silva Pereira   +1 more
doaj   +1 more source

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