Results 11 to 20 of about 64,005 (305)
Offset-compensated comparator with full-input range in 150nm FDSOI CMOS-3d technology [PDF]
This paper addresses an offset-compensated comparator with full-input range in the 150nm FDSOI CMOS- 3D technology from MIT- Lincoln Laboratory. The comparator discussed here makes part of a vision system.
Brea Sánchez, Víctor Manuel +5 more
core +1 more source
NVU dynamics. II. Comparing to four other dynamics [PDF]
In the companion paper [T. S. Ingebrigtsen, S. Toxvaerd, O. J. Heilmann, T. B. Schrøder, and J. C. Dyre, “NVU dynamics. I. Geodesic motion on the constant-potential-energy hypersurface,” J. Chem. Phys. (in press)] an algorithm was developed for tracing out a geodesic curve on the constant-potential-energy hypersurface. Here, simulations of NVU dynamics
Ingebrigtsen, Trond S. +3 more
openaire +3 more sources
A 0.15-to-0.5 V Body-Driven Dynamic Comparator with Rail-to-Rail ICMR
In this paper, a novel dynamic body-driven ultra-low voltage (ULV) comparator is presented. The proposed topology takes advantage of the back-gate configuration by driving the input transistors’ gates with a clocked positive feedback loop made of two AND
Riccardo Della Sala +4 more
doaj +1 more source
The article describes the dynamics researches of mechanical system of angle comparator. The goal of research is to determine the stability of mechanical system of angle comparator.
Valdemar Prokopovič +2 more
doaj +1 more source
Noise shaping Asynchronous SAR ADC based time to digital converter [PDF]
Time-to-digital converters (TDCs) are key elements for the digitization of timing information in modern mixed-signal circuits such as digital PLLs, DLLs, ADCs, and on-chip jitter-monitoring circuits.
Katragadda, Sowmya
core +1 more source
Comparative structural dynamic analysis of GTPases [PDF]
AbstractGTPases regulate a multitude of essential cellular processes ranging from movement and division to differentiation and neuronal activity. These ubiquitous enzymes operate by hydrolyzing GTP to GDP with associated conformational changes that modulate affinity for family-specific binding partners.
Hongyang Li, Xin-Qiu Yao, Barry J. Grant
openaire +6 more sources
A 10-bit Charge-Redistribution ADC Consuming 1.9 μW at 1 MS/s [PDF]
This paper presents a 10 bit successive approximation ADC in 65 nm CMOS that benefits from technology scaling. It meets extremely low power requirements by using a charge-redistribution DAC that uses step-wise charging, a dynamic two-stage comparator and
Elzakker, Michiel van +5 more
core +2 more sources
An Improved Strong Arm Comparator With Integrated Static Preamplifier
This paper presents a novel Strong Arm comparator in which the input pair is reused as a static amplifier to preamplify the input signal during the precharge phase. The proposed approach relaxes the main trade-offs that characterize the Strong Arm latch:
Valerio Spinogatti +4 more
doaj +1 more source
HTS pulse-stretcher and second order modulator: design and first results [PDF]
One of the remaining challenges in the application of superconducting electronics is the interfacing between superconducting and semiconducting environments. The voltage and speed mismatch between RSFQ pulses and semiconducting read-out electronics makes
Brinkman, Alexander +8 more
core +2 more sources
A Low-Power High-Speed Dynamic Comparator With a Transconductance-Enhanced Latching Stage
Low-power, high-speed dynamic comparators are highly desirable in the design of high-speed analog-to-digital converters (ADC) and digital I/O circuits. Most dynamic comparators use a pair of cross-coupled inverters as the latching stage, which provides ...
Yao Wang +5 more
doaj +1 more source

