Results 31 to 40 of about 64,005 (305)
A High-Speed and Low-Offset Dynamic Latch Comparator
The Scientific World Journal, 2014 Circuit intricacy, speed, low-offset voltage, and resolution are essential factors for high-speed applications like analog-to-digital converters (ADCs).
Labonnah Farzana Rahman +4 more
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Design of an Efficient Parallel Comparator Architecture for Low Power Delay Product
Advances in Electrical and Electronic Engineering, 2021 A binary comparator architecture is proposed in this work for static logic to achieve both low-power and high-performance operations. It also presents a detailed timing performance and power analysis of various state-of-the-art comparator designs.
Mangal Deep Gupta, Rajeev Kumar Chauhan
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When are comparative dynamics monotone? [PDF]
Review of Economic Dynamics, 2003 Abstract A common problem in dynamic economic theory is to determine when an increase in a parameter and/or an initial condition increases the future dynamics of a theoretical economy. This paper provides conditions that are necessary and sufficient for making statements of this type. The result is applicable to situations with a single agent or with
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Comparing Dynamic Equilibrium Economies to Data [PDF]
SSRN Electronic Journal, 2001 This paper studies the properties of the Bayesian approach to estimation and comparison of dynamic equilibrium economies. Both tasks can be performed even if the models are nonnested, misspecified, and nonlinear. First, the authors show that Bayesian methods have a classical interpretation: asymptotically the parameter point estimates converge to their
Jesús Fernández-Villaverde +1 more
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Sensors, 2022 This paper presents a low noise 0.6-V 400-kS/s asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) for input-referred noise reduction. A dual-domain comparator is proposed to optimize the power, noise, and sampling rate
Sang-Hun Lee, Won-Young Lee
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Offset-calibration with Time-Domain Comparators Using Inversion-mode Varactors [PDF]
, 2019 This paper presents a differential time-domain comparator formed by two voltage controlled delay lines, one per input terminal, and a binary phase detector for comparison solving.
Delgado Restituto, Manuel +2 more
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Comparing Families of Dynamic Causal Models
PLoS Computational Biology, 2010 Mathematical models of scientific data can be formally compared using Bayesian model evidence. Previous applications in the biological sciences have mainly focussed on model selection in which one first selects the model with the highest evidence and then makes inferences based on the parameters of that model.
Penny, Will D +6 more
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Mokslas: Lietuvos Ateitis, 2013 The aim of the research was to determine the mechanical stabilityof angle measurement comparator’s system. Vibrations weremeasured at the significant points of the system for that purposeand dynamic characteristics of the system were established ...
Artūras Kilikevičius +2 more
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Frontiers in Physics, 2022 A 10 bit 1 MS/s SAR ADC with one LSB common-mode shift energy-efficient switching scheme for image sensor is presented. Based on the two sub-capacitor arrays architecture and the common-mode technique, the proposed switching scheme achieves 98.45% less ...
Yunfeng Hu +3 more
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, 2014 The design and performance of a fully-synchronous multi-GHz analog transient waveform recorder I.C. ("SST") with fast and flexible trigger capabilities is presented.
Chiem, Edwin +2 more
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