Results 51 to 60 of about 137,190 (297)

Time-Shared Execution of Realtime Computer Vision Pipelines by Dynamic Partial Reconfiguration

open access: yes, 2018
This paper presents an FPGA runtime framework that demonstrates the feasibility of using dynamic partial reconfiguration (DPR) for time-sharing an FPGA by multiple realtime computer vision pipelines.
Hoe, James C., Nguyen, Marie
core   +1 more source

Component Substitution through Dynamic Reconfigurations [PDF]

open access: yes, 2014
Component substitution has numerous practical applications and constitutes an active research topic. This paper proposes to enrich an existing component-based framework--a model with dynamic reconfigurations making the system evolve--with a new ...
Kouchnarenko, Olga, Lanoix, Arnaud
core   +5 more sources

A dynamically reconfigurable asynchronous processor [PDF]

open access: yes2010 IEEE 8th Symposium on Application Specific Processors (SASP), 2010
The main design requirements for high-throughput mobile applications are energy efficiency and programmability. This paper presents a novel dynamically reconfigurable processor that targets these requirements. Our processor consists of a heterogeneous array of coarse grain asynchronous cells.
Khodor Ahmad Fawaz   +6 more
openaire   +1 more source

Speckle‐Engineered Upconversion Amplification in Nanoemulsion‐Templated Hydrogel Microdomes

open access: yesAdvanced Functional Materials, EarlyView.
Nanoemulsion‐confined PEGDA microdomes generate speckle‐like excitation fields that strongly amplify upconversion luminescence upon dehydration, enabling filter‐free visible readout with reversible on–off switching. DMD‐based lithography yields scalable, shape‐programmable arrays for moisture‐responsive displays and optical encryption.
Chaeyeong Ryu   +13 more
wiley   +1 more source

Shipboard power system dynamic reconfiguration optimization strategy considering time-varying load characteristics

open access: yesZhongguo Jianchuan Yanjiu
ObjectivesIn order to ensure the safe and stable operation of a shipboard power system under fault conditions, a dynamic reconfiguration optimization method is proposed that considers time-varying load characteristics.MethodsFirst, considering the ...
Qihuan WU   +4 more
doaj   +1 more source

Flexible Interconnection Network for Dynamically and Partially Reconfigurable Architectures

open access: yesInternational Journal of Reconfigurable Computing, 2010
The dynamic and partial reconfiguration of FPGAs enables the dynamic placement in reconfigurable zones of the tasks that describe an application. However, the dynamic management of the tasks impacts the communications since tasks are not present in the ...
Ludovic Devaux   +4 more
doaj   +1 more source

Integrative Dynamic Reconfiguration in a Parallel Stream Processing Engine [PDF]

open access: yes, 2016
Load balancing, operator instance collocations and horizontal scaling are critical issues in Parallel Stream Processing Engines to achieve low data processing latency, optimized cluster utilization and minimized communication cost respectively.
Cao, Jianneng   +2 more
core   +3 more sources

Single‐ and Dual‐Atom Configurations in Atomically Dispersed Catalysts for Lithium–Sulfur Batteries

open access: yesAdvanced Functional Materials, EarlyView.
Single‐atom and dual‐atom‐based atomically dispersed catalysts (ADCs) effectively address the shuttle effect and sluggish redox kinetics in Li–S batteries. With nearly 100% atomic utilization and tunable coordination environments, ADCs enhance LiPSs adsorption, lower conversion barriers, and accelerate sulfur redox reactions.
Haoyang Xu   +4 more
wiley   +1 more source

An Integrated Approach and Tool Support for the Design of FPGA-Based Multi-Grain Reconfigurable Systems

open access: yesIEEE Access, 2020
Dynamic partial reconfiguration technique can be used to modify regions of an FPGA as large as the whole reconfigurable fabric or as small as individual logic elements.
Rafael Zamacola   +3 more
doaj   +1 more source

Memory-efficient and fast run-time reconfiguration of regularly structured designs [PDF]

open access: yes, 2011
Previous work has shown that run-time reconfiguration of FPGAs benefits greatly from the use of Tunable LUT (TLUT) circuits. These can be rapidly transformed into a specialized LUT circuit and are also very memory efficient when representing regularly ...
Al Farisi, Brahim   +3 more
core   +2 more sources

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