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Combinational Equivalence Checking on AIGs
Theoretical and Natural ScienceCombinational Equivalence Checking (CEC) is a critical process in digital circuit design, ensuring that two versions of a circuit are functionally equivalent. Functionally Reduced And-Inverter Graphs (FRAIGs) are a data structure extensively used in CEC, representing Boolean functions as directed acyclic graphs with AND gates and inverters.
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Formal Equivalence Checking for Mobile Malware Detection and Family Classification
IEEE Transactions on Software Engineering, 2022Francesco Mercaldo, Antonella Santone
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Equivalence checking using Gröbner bases
2016 Formal Methods in Computer-Aided Design (FMCAD), 2016Amr Sayed-Ahmed +3 more
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Formal verification of code motion techniques using data-flow-driven equivalence checking
ACM Transactions on Design Automation of Electronic Systems, 2012Chandan Karfa, Chittaranjan Mandal
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Radiomic Features for Medical Images Tamper Detection by Equivalence Checking
Procedia Computer Science, 2019Luca Brunese +2 more
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Automatic equivalence checking of programs with uninterpreted functions and integer arithmetic
International Journal on Software Tools for Technology Transfer, 2015Jose C A P Monteiro
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Advanced methods for equivalence checking of analog circuits with strong nonlinearities
Formal Methods in System Design, 2009Sebastian Steinhorst
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