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On checking equivalence of simulation scripts
Journal of Logical and Algebraic Methods in Programming, 2021zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Mancini, Toni +4 more
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Equivalence Checking for Intelligent Circuits
2008 International Symposium on Intelligent Information Technology Application Workshops, 2008Equivalence checking is playing a significant role in Intelligent Circuits design. However, the common models for verification either have their complexity problems or have applicable limitations. In order to overcome the deficiencies, a model WGL (Weighted Generalized List) is proposed and based on WGL we give an algorithm for checking.
De-Hui Fan, Guang-Sheng Ma
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High Coverage Concolic Equivalence Checking
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2019A concolic approach, called Slec-Cf, to check sequential equivalence between a high-level (e.g., C++/SystemC) hardware description and an RTL (e.g., Verilog) is presented. Slec-Cf searches for counterexamples over the possible values of a set of "control signals" in a depth-first lexicographic manner, avoiding values that are unrealizable by any ...
Pritam Roy, Sagar Chaki, Pankaj Chauhan
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Equivalence checking of integer multipliers
Proceedings of the 2001 conference on Asia South Pacific design automation - ASP-DAC '01, 2001In this paper, we address on equivalence checking of integer multipliers, especially for the multipliers without structure similarity. Our approach is based on Hamaguchi's backward substitution method with the following improvements: (1) automatic identification of components to form proper cut points and thus dramatically improve the backward ...
null Jiunn-Chern Chen +1 more
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Model checking and equivalence checking
2009Introduction Owing to the advances in semiconductor technology, a large and complex system that has a wide variety of functionalities has been integrated on a single chip. It is called system-on-a-chip (SoC) or system LSI , since all of the components in an electronics system are built on a single chip.
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PatEC: Pattern-Based Equivalence Checking
2021Program parallelization is a common software engineering task, in which parallel design patterns are applied. While the focus of parallelization is on performance, the functional behavior should be kept invariant, i.e., sequential and parallelized program should be functionally equivalent.
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Novel Probabilistic Combinational Equivalence Checking
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2008Exact approaches to combinational equivalence checking, such as automatic test pattern generation-based, binary decision diagrams (BDD)-based, satisfiability-based, and hybrid approaches, have been proposed over the last two decades. Recently, we proposed another exact approach using signal probability.
null Shih-Chieh Wu +2 more
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Memory Modeling in ESL-RTL Equivalence Checking
2007 44th ACM/IEEE Design Automation Conference, 2007When designers create RTL models from a system-level specification, arrays in the system-level model are often implemented as memories in the RTL. Knowing the correspondence between ESL arrays and RTL memories can significantly reduce the complexity of a formal equivalence check between the ESL model and the RTL.
Alfred Koelbl +2 more
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ARDiff: An Equivalence Checking Framework
2020This repository contains the implementation of ARDiff: an equivalence checking framework that allows scaling symbolic-execution-based equivalence checking for cases that consider two subsequent versions of a program.
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SDL Versus C Equivalence Checking
2005We present a tool that automatically checks the existence of a bisimulation relation between an SDL specification and the corresponding auto-generated C code. The tool has been used to verify part of the C implementation of a WiFi Medium Access Controller (IEEE 802.11) that has been derived from its original SDL specification using the Telelogic ...
Malek Haroud, Armin Biere
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