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Parameterized Program Equivalence Checking

2011
In the previous chapter we discussed an approach to verify if two programs are equivalent, thereby proving that the translation (performed by an HLS tool) from high-level design to low-level design is correct. In this chapter, we discuss another approach that guarantees correctness of the translation from high-level design to low-level design, by ...
openaire   +1 more source

RTL-TLM equivalence checking based on simulation

Proceedings of IEEE East-West Design & Test Symposium (EWDTS'08), 2008
The always increasing complexity of digital systems is overcome in design flows based on Transaction Level Modeling (TLM) by designing and verifying the system at different abstraction levels above RTL. The bottom-up approach is often adopted in the design flow when already existing RTL IPs are abstracted to be reused into the TLM system.
BOMBIERI, Nicola   +2 more
openaire   +1 more source

Semantic program alignment for equivalence checking

Proceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation, 2019
We introduce a robust semantics-driven technique for program equivalence checking. Given two functions we find a trace alignment over a set of concrete executions of both programs and construct a product program particularly amenable to checking equivalence.
Berkeley Churchill   +3 more
openaire   +1 more source

Equivalence Checking of Arithmetic Circuits

2006
Although equivalence checking technology has matured greatly during the last few years and designs with millions of gates can be handled, some specific problems remain to be difficult. Formal verification of arithmetic circuits, especially if multiplication is involved, is one of these problems.
Dominik Stoffel   +3 more
openaire   +1 more source

Equivalence checking for digital circuits

IEEE Potentials, 2004
Integrated circuit technology has made it possible to produce chips with several millions of transistors. However, the increasingly more complex digital circuit designs and limited time constraints only add to the pressure during the implementation process.
openaire   +1 more source

Equivalence Checking of Sequential Quantum Circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022
Qisheng Wang, Riling Li, Ming-Sheng Ying
exaly  

Equivalence Checking of Quantum Circuits With the ZX-Calculus

IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2022
Tom Peham   +2 more
exaly  

Equivalence Checking

2016
Andreas Kuehlmann   +3 more
openaire   +1 more source

Advanced Equivalence Checking for Quantum Circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2021
Lukas Burgholzer, Robert Wille
exaly  

QCEC: A JKQ tool for quantum circuit equivalence checking

Software Impacts, 2021
Lukas Burgholzer, Robert Wille
exaly  

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