Results 231 to 240 of about 1,502 (257)

Fault-tolerant gait generation for locked joint failures

SMC'03 Conference Proceedings. 2003 IEEE International Conference on Systems, Man and Cybernetics. Conference Theme - System Security and Assurance (Cat. No.03CH37483), 2004
This paper addresses the issue of tolerating a locked joint failure in gait planning for hexapod robots which have symmetric structures and legs in the form of an articulated arm with three revolute joints. A locked joint failure is one for which a joint cannot move and is locked in place. If a failed joint is locked, the workspace of the resulting leg
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A connectionist model for lock coil rope fault prediction

Insight - Non-Destructive Testing and Condition Monitoring, 2008
In this paper, a neural network-based method of wire rope fault prediction in a system is proposed. This method is developed based on past observations on various wire rope parameters for lock coil rope, for example number of rope used in the system, period of test, number of faults, etc.
D Basak, S Pal, P Basak, D Palit, D Chandra Patranabis   +4 more
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Analysis of Software-Implemented Fault Tolerance: Case Study on Smart Lock

2020 IEEE East-West Design & Test Symposium (EWDTS), 2020
In our research, we focus on Fault-Tolerant system design and testing. Recently, we also studied Fault Tolerance against random and deliberate faults of electronic smart locks. In our last research, we tested Software-Implemented Fault Tolerance in the controller of a smart electronic lock.
Jakub Lojda, Richard Panek, Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Zdenek Kotásek   +5 more
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Point defects and lock-in faults in columnar phases

Liquid Crystals, 1990
Abstract We show the existence of point defects connected by strings in columnar phases. The most interesting consequence is the increase, by several orders of magnitudes, of the bend elastic modulus as compared to values for nematics.
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A Physical Model for Interseismic Erosion of Locked Fault Asperities

Journal of Geophysical Research: Solid Earth, 2017
AbstractThe conventional “asperity model” posits that faults are partitioned into fixed velocity‐weakening (VW) patches (asperities) that are locked interseismically and velocity‐strengthening (VS) regions that creep stably without accumulating stress. However, studies of GPS‐derived deformation in northern Japan have shown that interseismic strain in ...
Andreas P. Mavrommatis, Paul Segall, Kaj M. Johnson   +2 more
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Kinematic Constraints on Fault-Tolerant Gaits for a Locked Joint Failure

Journal of Intelligent and Robotic Systems, 2006
Fault-tolerant gaits in legged locomotion are defined as gaits with which legged robots can continue their walking after a failure event has occurred to a leg of the robot. For planning an efficient fault-tolerant gait, kinematic constraints and remaining mobility of the failed leg should be closely examined with each other.
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Imaging the Electrical Resistivity Structure of a Locked Fault Segment: The Ganos Fault example

The Ganos Fault, in the westernmost part of the North Anatolian Fault Zone (NAFZ), stayed quiet for approximately 146 years before two catastrophic events shook the area in the summer of 1912. The historical records point out that two devastating activities shook both sides of the Marmara Sea in 1766, too. Following the 1766 events, on August 9th, 1912,
Bülent Tank, Ruken Yazıcı, Esra Doğukan, Tunç Demir, Gözde Taşseten, Pınar Duran, Tannaz Assar   +6 more
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A Reconfiguration-Based Fault-Tolerant Anti-Lock Brake-by-Wire System

ACM Transactions on Embedded Computing Systems, 2018
Anti-Lock Braking Systems (ABS) and Brake-by-Wire Systems (BBW) are safety-critical applications by nature. Such systems are required to demonstrate high degrees of dependability. Fault-tolerance is the primary means to achieve dependability at runtime and has been an active research area for decades.
Belal H. Sababha, Yazan A. Alqudah
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Structural fault diagnosis in charge-pump based phase-locked loops

18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design, 2005
An approach is presented for identifying structural-faults, using the charge-frequency based built-in-self test (CF-BIST) technique in a phase-locked loop (PLL) circuit, for a standard 0.18 /spl mu/m CMOS process. This method not only validated the CF-BIST approach for fault detection, but also showed an algorithm for how this approach may possibly be ...
Aditya Sankar Medury, Ingvar Carlson, Atila Alvandpour, John Stensby   +3 more
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Fault-tolerant synchronization using phase-locked clocks

Microelectronics Reliability, 1990
Abstract Real-time computer systems are increasingly being used in the control of life-critical processes such as aircraft. Such computers are generally multiprocessors. It is very important to be able to tightly and reliabily synchronize the various processors.
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