Results 211 to 220 of about 1,502 (257)

Application Research on High-Precision Tiltmeter with Rapid Deployment Capability. [PDF]

Sensors (Basel)
Yang F, Guan D, Li X, Dou C.
europepmc   +1 more source

Numerical investigation on the seismically induced progressive failure of the 2017 Xinmo landslide in China. [PDF]

Sci Rep
Zhu L, Chen L, Wei T, Cui S, Sun P, Luo L, Liang Y.   +6 more
europepmc   +1 more source

Variability in interseismic strain accumulation rate and style along the Altyn Tagh Fault. [PDF]

Nat Commun
Shen L, Hooper A, Elliott JR, Wright TJ.
europepmc   +1 more source

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Logic Locking Induced Fault Attacks

2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2020
Logic locking has been presented in the past as a solution to avoid overproduction or product piracy. All solutions so far assume or rely on the protection of the correct locking key. This paper does not target the break of locking schemes but looks at another highly critical security risk which comes with modified locking keys: The enabling of fault ...
, Michael Gruber, Michael Tempelmeier
exaly   +2 more sources

Lock Violation for Fault-tolerant Distributed Database System

2021 IEEE 37th International Conference on Data Engineering (ICDE), 2021
Modern distributed database systems scale horizontally by partitioning their data across a large number of nodes. Most such systems build their transactional layers on a replication layer, employing a consensus protocol to ensure data consistency to achieve fault tolerance.
Hua Guo 0004, Xuan Zhou 0001, Le Cai
openaire   +1 more source

AFIA: ATPG-Guided Fault Injection Attack on Secure Logic Locking

Journal of Electronic Testing: Theory and Applications (JETTA), 2022
The outsourcing of the design and manufacturing of integrated circuits has raised severe concerns about the piracy of Intellectual Properties and illegal overproduction. Logic locking has emerged as an obfuscation technique to protect outsourced chip designs, where the circuit netlist is locked and can only be functional once a secure key is programmed.
Jiafeng Xie, Ujjwal Guin, Yadi Zhong
exaly   +3 more sources

Speeding Up Logic Locking via Fault Emulation and Dynamic Multiple Fault Injection

Journal of Electronic Testing: Theory and Applications (JETTA), 2015
Today's Integrated Circuit (IC) industry is suffering from piracy, overbuild ICs, and hardware Trojans. One way to protect ICs is logic locking. Logic locking is done by inserting extra logic to the original design's netlist such that correct outputs are produced only when the correct key is applied.
Cemil Cem Gursoy, , Sezer Goren
exaly   +3 more sources

Fault and Soft Error Tolerant Delay-Locked Loop

2020 IEEE 29th Asian Test Symposium (ATS), 2020
We present in this paper the first fault and soft error tolerant Delay-Locked Loop (DLL) design, useful for the clock synchronization in a chip incorporating heterogeneous functional dies. In this robust DLL design, we introduce a powerful timing correction scheme to remedy the timing shortfall in a naive Triple-Module Redundancy (TMR) architecture ...
Jun-Yu Yang, Shi-Yu Huang
openaire   +1 more source

A distributed lock manager on fault tolerant MPP

Proceedings of the Twenty-Eighth Annual Hawaii International Conference on System Sciences, 2002
The Distributed Lock Manager (DLM) is the cornerstone of running the Oracle Parallel Server on a MPP Unix system. The DLM grants resource locks in NULL, READ, WRITE, and other levels. The DLM is typically implemented either with distributed message passing or in global memory, depending on the architecture.
Mark Aldred, Ilya Gertner, Stephen McKellar   +2 more
openaire   +1 more source

A fault-tolerant resource locking protocol for multiprocessor real-time systems

Microelectronics Journal, 2023
Hamed Farbeh
exaly   +2 more sources