Results 211 to 220 of about 61,255 (268)
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1991
A fault model for programmable logic arrays (PLAs) is discussed that handles four classes of faults: multiple stuck-at faults, multiple bridging faults, multiple crosspoint faults, and faults due to breaks in lines. It is shown that a test that detects all multiple crosspoint faults also detects all multiple stuck-at faults, multiple bridging faults ...
Michiel M. Ligthart, Rudi J. Stans
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A fault model for programmable logic arrays (PLAs) is discussed that handles four classes of faults: multiple stuck-at faults, multiple bridging faults, multiple crosspoint faults, and faults due to breaks in lines. It is shown that a test that detects all multiple crosspoint faults also detects all multiple stuck-at faults, multiple bridging faults ...
Michiel M. Ligthart, Rudi J. Stans
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Segment delay faults: a new fault model
Proceedings of 14th VLSI Test Symposium, 2002We propose a segment delay fault model to represent any general delay defect ranging from a spot defect to a distributed defect. The segment length, L, is a parameter that can be chosen based on available statistics about the types of manufacturing defects.
Keerthi Heragu +2 more
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On double transition faults as a delay fault model
Proceedings of the Sixth Great Lakes Symposium on VLSI, 2002We define a new delay fault model, called the double transition fault model. Under this model, a fault is associated with a pair of lines and a pair of transitions on these lines. The model captures the effects of defects that increase the delays of two (or more) individual lines by an amount that causes the circuit to fail when signals are propagated ...
Irith Pomeranz +2 more
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Generic Fault Modelling for Fault Injection
2011Fault injection is a widely used experimental dependability validation method, with a vast amount of techniques and tools. Within the scope of MOGENTES, an EU 7th framework programme project, tools have been developed which implements three different fault injection techniques; hardware-implemented fault injection, software-implemented fault injection ...
Rickard Svenningsson +3 more
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On the efficiency of the transition fault model for delay faults
1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers, 2002A study is presented concerning the efficiency of test pattern sets generated with the transition fault model applied to fine grained delay fault models. The authors have developed the delay fault simulator DELFI-a program which is capable of simulating timing failures of combinational circuits using different delay fault models.
Manfred Geilert +2 more
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Zero-aliasing for modeled faults
IEEE Transactions on Computers, 1995Summary: When using Built-In Self-Test (BIST) for testing VLSI circuits the circuit response to an input test sequence, which may consist of thousands to millions of bits, is compacted into a signature which consists of only tens of bits. Usually a linear feedback shift register (LFSR) is used for response compaction via polynomial division.
Mody Lempel, Sandeep K. Gupta
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On Testing Output Faults in the McClusky Fault Model
J. Autom. Lang. Comb., 2012Journal of Automata, Languages and Combinatorics, Volume 17, Number 1, 2012, 3 ...
Ulrike Brandt, Hermann K.-G. Walter
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Incremental Fault Analysis: Relaxing the Fault Model of Differential Fault Attacks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2020This article presents a new fault analysis technique against cryptographic devices called the incremental fault analysis (IFA), which can be adapted into fault attacks using more traditional differential fault analysis (DFA) techniques in order to increase their feasibility under more practical fault injection conditions.
Trevor E. Pogue, Nicola Nicolici
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Stuck-at fault: a fault model for the next millennium
Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270), 2002One of the common misconceptions about a stuck-at fault model is that it does not model a physical defect accurately and therefore is not adequate for testing defects in advancing technologies. Stuck-at fault model can be described as anything but a physical defect model.
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Combining fault avoidance, fault removal and fault tolerance: an integrated model
14th IEEE International Conference on Automated Software Engineering, 2003Fault avoidance, fault removal and fault tolerance represent three successive lines of defense against the contingency of faults in software systems and their impact on system reliability. Beyond the colorful discussions of the relative merits of these techniques, the law of diminishing returns advocates that they be used in concert, where each is ...
Ali Mili 0001 +3 more
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