Results 91 to 100 of about 197,062 (388)

Ultrafast jet classification at the HL-LHC

open access: yesMachine Learning: Science and Technology
Three machine learning models are used to perform jet origin classification. These models are optimized for deployment on a field-programmable gate array device.
Patrick Odagiu   +15 more
doaj   +1 more source

Quantum Emitters in Hexagonal Boron Nitride: Principles, Engineering and Applications

open access: yesAdvanced Functional Materials, EarlyView.
Quantum emitters in hexagonal boron nitride have emerged as a promising candidate for quantum information science. This review examines the fundamentals of these quantum emitters, including their level structures, defect engineering, and their possible chemical structures.
Thi Ngoc Anh Mai   +8 more
wiley   +1 more source

Integration of Perovskite/Low‐Dimensional Material Heterostructures for Optoelectronics and Artificial Visual Systems

open access: yesAdvanced Functional Materials, EarlyView.
Heterojunctions combining halide perovskites with low‐dimensional materials enhance optoelectronic devices by enabling precise charge control and improving efficiency, stability, and speed. These synergies advance flexible electronics, wearable sensors, and neuromorphic computing, mimicking biological vision for real‐time image analysis and intelligent
Yu‐Jin Du   +11 more
wiley   +1 more source

Implementation of Reed-Solomon Encoder/Decoder Using Field Programmable Gate Array

open access: yesJournal of Engineering and Sustainable Development, 2006
In this paper, (15, 11) and (255, 239) Reed-Solomon codes have been designed and Implemented using ALTERA Field Programmable Gate Array (FPGA) device. The design is carried out by writing VHDL modules for different encoder and decoder components.
Hikmat N. Abdullah
doaj  

Impact of Parallel Gating on Gate Fidelities in Linear, Square, and Star Arrays of Noisy Flip-Flop Qubits [PDF]

open access: yes
Successfully implementing a quantum algorithm involves maintaining a low logical error rate by ensuring the validity of the quantum fault-tolerance theorem. The required number of physical qubits arranged in an array depends on the chosen Quantum Error Correction code and the achievable physical qubit error rate.
arxiv   +1 more source

All‐in‐One Analog AI Hardware: On‐Chip Training and Inference with Conductive‐Metal‐Oxide/HfOx ReRAM Devices

open access: yesAdvanced Functional Materials, EarlyView.
An all‐in‐one analog AI accelerator is presented, enabling on‐chip training, weight retention, and long‐term inference acceleration. It leverages a BEOL‐integrated CMO/HfOx ReRAM array with low‐voltage operation (<1.5 V), multi‐bit capability over 32 states, low programming noise (10 nS), and near‐ideal weight transfer.
Donato Francesco Falcone   +11 more
wiley   +1 more source

Efficient Computations of Encodings for Quantum Error Correction [PDF]

open access: yes, 1996
We show how, given any set of generators of the stabilizer of a quantum code, an efficient gate array that computes the codewords can be constructed. For an n-qubit code whose stabilizer has d generators, the resulting gate array consists of O(n d) operations, and converts k-qubit data (where k = n - d) into n-qubit codewords.
arxiv   +1 more source

Transducer Materials Mediated Deep Brain Stimulation in Neurological Disorders

open access: yesAdvanced Functional Materials, EarlyView.
This review discusses advanced transducer materials for improving deep brain stimulation (DBS) in neurological disorders. These materials respond to light, ultrasound, or magnetic fields, enabling precise, less invasive neuromodulation. Their stimulus‐responsive properties enhance neural control and adaptive therapy, paving the way for next‐generation ...
Di Zhao   +5 more
wiley   +1 more source

SOTB Implementation of a Field Programmable Gate Array with Fine-Grained Vt Programmability

open access: yesJournal of Low Power Electronics and Applications, 2014
Field programmable gate arrays (FPGAs) are one of the most widespread reconfigurable devices in which various functions can be implemented by storing circuit connection information and logic values into configuration memories.
Masakazu Hioki   +7 more
doaj   +1 more source

A binary self-organizing map and its FPGA implementation [PDF]

open access: yes, 2009
A binary Self Organizing Map (SOM) has been designed and implemented on a Field Programmable Gate Array (FPGA) chip. A novel learning algorithm which takes binary inputs and maintains tri-state weights is presented.
Appiah, Kofi   +7 more
core   +1 more source

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