Results 91 to 100 of about 132,738 (209)

Field-programmable gate array (FPGA)-based designed using VHDL hardware description language transmission performance analysis of binary phase shift keying (BPSK) and quadrature phase shift Keying (QPSK) modulators

, 2013
Binary phase shift keying (BPSK) and quadrature phase shift Keying (QPSK)modulation techniques are often proposed for satellite communications and band-limited communication channels; however, both modulations are important in high speed data ...
Emmanuel Kwon-Ndung, Nidia Noemi, J. Gichuki, Li Xianyi, Mevlüt Doğan, K. Thong, B. Fielding, Naqib Ullah Khan, Choonki Ahn   +8 more
semanticscholar   +1 more source

Field Programmable Gate Arrays with Hardwired Networks on Chip [PDF]

, 2012
Technology down-scaling and platform-based designs have enforced a number of application and architecture trends for system-on-chip (SOC) designs. A modern SOC is now a multi-functional machine that can execute a large number of complex applications by using tens or even hundreds of intellectual properties (IPs).
openaire   +3 more sources

Routing architectures for hierarchical field programmable gate arrays [PDF]

, 2002
Aneesh Aggarwal, David Lewis
openalex   +1 more source

Firmware-only implementation of time-to-digital converter (TDC) in field-programmable gate array (FPGA) [PDF]

, 2003
Jinyuan Wu, Zonghan Shi, I.Y. Wang
openalex   +1 more source

The Impact of Pipelining on Energy per Operation in Field-Programmable Gate Arrays [PDF]

, 2004
Steven J. E. Wilton, Su-Shin Ang, Wayne Luk   +2 more
openalex   +1 more source

An efficient AES implementation using FPGA with enhanced security features

Journal of King Saud University: Engineering Sciences, 2020
Data transferred in an electronic way is vulnerable to attacks. With an aim to protect data for secure communication, a new Hybrid non pipelined Advanced Encryption Standard (AES) algorithm based on traditional AES algorithm with enhanced security ...
Harshali Zodpe, Ashok Sapkal
doaj  

Reconfigurable Readback-Signal Generator Based on a Field-Programmable Gate Array [PDF]

, 2004
Jie Chen, J. Moon, Kia Bazargan
openalex   +1 more source

Programmable Memristive Threshold Logic Gate Array [PDF]

arXiv, 2018
This paper proposes the implementation of programmable threshold logic gate (TLG) crossbar array based on modified TLG cells for high speed processing and computation. The proposed TLG array operation does not depend on input signal and time pulses, comparing to the existing architectures.
arxiv  

Comprehensive Review on the Exploitation of Advanced Memory Optimization Strategies to Improve Performance for Convolutional and Spiking Neural Networks in Medical Imaging Using Hardware Accelerators

IEEE Access
Advanced memory optimization techniques are reviewed to enhance the performance of Convolutional Neural Networks (CNNs) and Spiking Neural Networks (SNNs) on hardware accelerators, addressing the real-world challenges in medical imaging.
N. Srikanth Prasad, S. Sundar
doaj   +1 more source

An embedded flexible content-addressable memory core for inclusion in a Field-Programmable Gate Array [PDF]

, 2004
Steven J. E. Wilton, Charles W. Jones, Julien Lamoureux   +2 more
openalex   +1 more source