Results 1 to 10 of about 325,658 (188)

Programmable quantum gate arrays [PDF]

open access: yesPhysical Review Letters, 1997
We show how to construct quantum gate arrays that can be programmed to perform different unitary operations on a data register, depending on the input to some program register.
A. Barenco   +9 more
core   +4 more sources

Mixed-precision weights network for field-programmable gate array. [PDF]

open access: yesPLoS ONE, 2021
In this study, we introduced a mixed-precision weights network (MPWN), which is a quantization neural network that jointly utilizes three different weight spaces: binary {-1,1}, ternary {-1,0,1}, and 32-bit floating-point.
Ninnart Fuengfusin, Hakaru Tamukoh
doaj   +2 more sources

A Low-Power Reconfigurable Logic Array Based on Double-Gate Transistors [PDF]

open access: yesIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2008
A fine-grained reconfigurable architecture based on double gate technology is proposed and analyzed. The logic function operating on the first gate of a double-gate (DG) transistor is reconfigured by altering the charge on its second gate.
Paul Beckett
exaly   +2 more sources

Parallelized Field-Programmable Gate Array Data Processing for High-Throughput Pulsed-Radar Systems [PDF]

open access: yesSensors
A parallelized field-programmable gate array (FPGA) architecture is proposed to realize an ultra-fast, compact, and low-cost dual-channel ultra-wideband (UWB) pulsed-radar system.
Aaron D. Pitcher   +3 more
doaj   +2 more sources

Multipoint Detection Technique with the Best Clock Signal Closed-Loop Feedback to Prolong FPGA Performance

open access: yesApplied Sciences, 2021
The degradation effect of a field-programmable gate array becomes a significant issue due to the high density of logic circuits inside the field-programmable gate array. The degradation effect occurs because of the rapid technology scaling process of the
Anuar Jaafar   +4 more
doaj   +1 more source

FPGA Implementation of Threshold-Type Binary Memristor and Its Application in Logic Circuit Design

open access: yesMicromachines, 2021
In this paper, a memristor model based on FPGA (field programmable gate array) is proposed, by using which the circuit of AND gate and OR gate composed of memristors is built. Combined with the original NOT gate in FPGA, the NAND gate, NOR gate, XOR gate
Liu Yang   +3 more
doaj   +1 more source

Gate reflectometry in dense quantum dot arrays

open access: yesNew Journal of Physics, 2023
Silicon quantum devices are maturing from academic single- and two-qubit devices to industrially-fabricated dense quantum-dot (QD) arrays, increasing operational complexity and the need for better pulsed-gate and readout techniques.
Fabio Ansaloni   +14 more
doaj   +1 more source

Amorphous IGZO Thin-Film Transistor Gate Driver in Array for Ultra-Narrow Border Displays

open access: yesIEEE Journal of the Electron Devices Society, 2022
A gate driver in array (GIA) design based on the amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor (TFT) is developed for narrow border displays.
Liufei Zhou   +6 more
doaj   +1 more source

Continuous-Time Programming of Floating-Gate Transistors for Nonvolatile Analog Memory Arrays

open access: yesJournal of Low Power Electronics and Applications, 2021
Floating-gate (FG) transistors are a primary means of providing nonvolatile digital memory in standard CMOS processes, but they are also key enablers for large-scale programmable analog systems, as well.
Brandon Rumberg   +4 more
doaj   +1 more source

Remote capacitive sensing in two-dimension quantum-dot arrays [PDF]

open access: yes, 2020
We investigate gate-defined quantum dots in silicon on insulator nanowire field-effect transistors fabricated using a foundry-compatible fully-depleted silicon-on-insulator (FD-SOI) process.
Duan, Jingyu   +5 more
core   +2 more sources

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