HAPQ: A Hardware-Aware Pruning and Quantization Pipeline for Event-Based SNN Detection. [PDF]
Li Z, Wu J.
europepmc +1 more source
All-digital aliasing-free PWM transmitter with reduced filtering requirements. [PDF]
Haque MFU, Ahmed H, Johansson T.
europepmc +1 more source
Heterogeneous Tapped Delay-Line Time-to-Digital Converter on Artix-7 FPGA. [PDF]
Chen R, Chen P, Li K, Liu H.
europepmc +1 more source
Impact of Fabrication Defects on FPGA Logic Using Memristor-Based Memory Cells. [PDF]
Schoenen J +10 more
europepmc +1 more source
A comparative study of industrial and open-source SCADAs to optimize the design of control systems for the IFMIF-DONES plant. [PDF]
Cruz-Miranda J +4 more
europepmc +1 more source
Ring Oscillators with Additional Phase Detectors as a Random Source in a Random Number Generator. [PDF]
Matuszewski Ł, Jessa M, Nikonowicz J.
europepmc +1 more source
Advancing neuroengineering with Neuromorphic Twins. [PDF]
Chiappalone M, Levi T.
europepmc +1 more source
Enhanced FPGA-based smart power grid simulation using Heun and Piecewise analytic method. [PDF]
Gul U +5 more
europepmc +1 more source
Cross-Detection for Bubble-free Thermometer Codes and Dual-Side Monitoring for FPGA-Based High-Accuracy and High-Precision Time-to-Digital Converters. [PDF]
Lee D, Yi M, Kwon SI.
europepmc +1 more source
SpChipADF: An Architecture Design Framework for Radar Signal Processing Hardware Accelerators. [PDF]
Wang H +8 more
europepmc +1 more source

