Results 1 to 10 of about 47,684 (233)

A field-programmable gate array (FPGA)-based data acquisition system for closed-loop experiments. [PDF]

Rev Sci Instrum, 2022
Delgadillo Bonequi I, Stroschein A, Koerner LJ.   +2 more
europepmc   +2 more sources

Field-Programmable Gate Array (FPGA)-Based Lock-In Amplifier System with Signal Enhancement: A Comprehensive Review on the Design for Advanced Measurement Applications. [PDF]

Sensors (Basel)
Galaviz-Aguilar JA, Vargas-Rosales C, Falcone F, Aguilar-Avelar C.   +3 more
europepmc   +2 more sources

FPGA Implementation of Threshold-Type Binary Memristor and Its Application in Logic Circuit Design

Micromachines, 2021
In this paper, a memristor model based on FPGA (field programmable gate array) is proposed, by using which the circuit of AND gate and OR gate composed of memristors is built. Combined with the original NOT gate in FPGA, the NAND gate, NOR gate, XOR gate
Liu Yang, Yuqi Wang, Zhiru Wu, Xiaoyuan Wang   +3 more
doaj   +1 more source

Implementing EW Receivers Based on Large Point Reconfigured FFT on FPGA Platforms [PDF]

International Journal of Computational Intelligence Systems, 2011
This paper presents design and implementation of digital receiver based on large point fast Fourier transform (FFT) suitable for electronic warfare (EW) applications.
He Chen, Xiujie Qu, Yuedong Luo, Chenwei Deng   +3 more
doaj   +1 more source

Wykorzystanie struktur FPGA do implementacji algorytmów cyfrowego przetwarzania sygnałów [PDF]

Problemy Mechatroniki, 2017
W artykule opisano zaprojektowany, wykonany praktycznie oraz przebadany dwukanałowy tor cyfrowego przetwarzania sygnału z układem FPGA (Field-Programmable Gate Array), w którym zaimplementowano algorytmy DSP.
Stanisław GRZYWIŃSKI, Krzysztof ACHTENBERG   +1 more
doaj   +1 more source

An efficient AES implementation using FPGA with enhanced security features

Journal of King Saud University: Engineering Sciences, 2020
Data transferred in an electronic way is vulnerable to attacks. With an aim to protect data for secure communication, a new Hybrid non pipelined Advanced Encryption Standard (AES) algorithm based on traditional AES algorithm with enhanced security ...
Harshali Zodpe, Ashok Sapkal
doaj   +1 more source

High-resolution FPGA-pulse width modulation applied to PFC 2 MHz converter using eGaN field effect transistor

The Journal of Engineering, 2019
This study proposes an implementation based on a low-cost field-programmable gate array (FPGA) of a high-resolution pulse width modulation applied on a single-phase power factor correction (PFC) converter operating with 2 MHz switch frequency.
José Augusto Arbugeri, Cesar Augusto Arbugeri, Samir Ahmad Mussa   +2 more
doaj   +1 more source

Programmable Logic Devices in Experimental Quantum Optics [PDF]

, 2002
We discuss the unique capabilities of programmable logic devices (PLD's) for experimental quantum optics and describe basic procedures of design and implementation.
Andrews, Armen, Cseta, Doherty, Doherty, Hideo Mabuchi, Hood, John Stockton, Michael Armen, Rabitz, Rahn, Sackett, Wiseman   +12 more
core   +2 more sources

Implementation of the block cipher Rijndael using Altera FPGA

Journal of Telecommunications and Information Technology, 2001
A short description of the block cipher Rijndael is presented. Hardware implementation by means of the FPGA (field programmable gate array) technology is evaluated. Im- plementation results compared with other hardware imple- mentations are summarized.
Piotr Mroczkowski
doaj   +1 more source

A binary self-organizing map and its FPGA implementation [PDF]

, 2009
A binary Self Organizing Map (SOM) has been designed and implemented on a Field Programmable Gate Array (FPGA) chip. A novel learning algorithm which takes binary inputs and maintains tri-state weights is presented.
Appiah, Kofi, Hobden, Mervyn, Hobden, Peter, Hunter, Andrew, Meng, Hongying, Pettit, Cy, Priestley, Nigel, Yue, Shigang   +7 more
core   +1 more source