Results 41 to 50 of about 47,684 (233)
This study achieves the synergistic integration of self‐powered sensing and edge AI acceleration to establish a real‐time fault diagnosis system. The proposed TENG‐based self‐powered bearing sensor (NSE‐TBS) and FPGA‐accelerated edge AI framework fundamentally break through the inherent limitations of conventional monitoring systems, including complex ...
Kehui Zhu +7 more
wiley +1 more source
How FPGAs Can Help Create Self-Recoverable Antenna Arrays
An approach to utilize Field Programmable Gate Array (FPGA) technology to control antenna arrays is presented based on the scenario of sensing a failure of any array element, analyzing degradation of the radiation pattern due to that failure, and finding
Miroslav Joler
doaj +1 more source
FPGA Implementation of A∗ Algorithm for Real-Time Path Planning
The traditional A∗ algorithm is time-consuming due to a large number of iteration operations to calculate the evaluation function and sort the OPEN list.
Yuzhi Zhou, Xi Jin, Tianqi Wang
doaj +1 more source
Systems and methods for detecting a failure event in a field programmable gate array [PDF]
An embodiment generally relates to a method of self-detecting an error in a field programmable gate array (FPGA). The method includes writing a signature value into a signature memory in the FPGA and determining a conclusion of a configuration refresh ...
Herath, Jeffrey A., Ng, Tak-Kwong
core +1 more source
Towards Lattice Quantum Chromodynamics on FPGA devices [PDF]
In this paper we describe a single-node, double precision Field Programmable Gate Array (FPGA) implementation of the Conjugate Gradient algorithm in the context of Lattice Quantum Chromodynamics.
Korcyl, Grzegorz, Korcyl, Piotr
core +2 more sources
Memristive Physical Reservoir Computing
Memristors’ nonlinear dynamics and input‐dependent memory effects make them ideal candidates for high‐performance physical reservoir computing (RC). Based on their conductance modulation, memristors can be classified as electronic or optoelectronic types.
Dian Jiao +9 more
wiley +1 more source
Dynamic reconfiguration technologies based on FPGA in software defined radio system [PDF]
Partial Reconfiguration (PR) is a method for Field Programmable Gate Array (FPGA) designs which allows multiple applications to time-share a portion of an FPGA while the rest of the device continues to operate unaffected.
Ke He +3 more
core +2 more sources
Metasurface‐Enabled Active‐Like Passive Radar
A programmable space‐time‐coding metasurface embeds distinct spatiotemporal tags into ambient wireless signals, allowing passive radar to operate in an active‐like manner. By enabling code‐correlated reconstruction under interference, the approach supports robust real‐time UAV tracking in complex environments and points to intelligent, low‐power ...
Mingyi Li +7 more
wiley +1 more source
This paper presents an improved adaptive fuzzy logic speed controller for a DC motor, based on field programmable gate array (FPGA) hardware implementation.
E.A. Ramadan, M. El-bardini, M.A. Fkirin
doaj +1 more source
Development of an FPGA-based gate signal generator for a multilevel inverter [PDF]
The application of Field Programmable Gate Array (FPGA) in the development of power electronics circuits control scheme has drawn much attention lately due to its shorter design cycle, lower cost and higher density. This paper presents an FPGA-based gate
Azli, N. Ahmad, Salim, F.
core

