Results 61 to 70 of about 47,684 (233)

Implementación del algoritmo Threefish-256 en hardware reconfigurable

Iteckne, 2014
This article  presents  both  the  description and  results  of  the Threefish  cryptographic  algorithm hardware  implementation  for  encryption  process.
Nathaly Nieto-Ramírez, Rubén Darío Nieto-Londoño   +1 more
doaj   +1 more source

FPGA Implementation of a General Space Vector Approach on a 6-Leg Voltage Source Inverter [PDF]

, 2011
A general algorithm of a Space Vector approach is implemented on a 6-leg VSI controlling a PM synchronous machine with three independent phases. In this last case, the necessity of controlling the zero-sequence current motivates the choice of a special ...
BRUYERE, Antoine, CENSE, Sébastien, COLAS, Frédéric, IDKHAJINE, Lahoucine, KESTELYN, Xavier, SANDULESCU, Paul, SEMAIL, Eric   +6 more
core   +6 more sources

Terahertz Channel Modeling, Estimation and Localization in RIS‐Assisted Systems

Advanced Electronic Materials, EarlyView.
Reconfigurable intelligent surfaces have become a recent intensive research focus. Based on practical applications, channel strategies for RIS‐assisted terahertz wireless communication systems are categorized into three different types: channel modeling, channel estimation, and channel localization.
Hongjing Wang, Weipeng Wang, Xuan Cong, Shiyu Wang, Gao Li, Sen Gong, Lin Huang, Hongxin Zeng, Yaxin Zhang, Ziqiang Yang   +9 more
wiley   +1 more source

Implementation of a Recursive Data of Adaptive QRD-RIS Algorithm Using HDI Coder

Journal of Engineering and Sustainable Development, 2013
Matrix inversion is a common function found in many algorithms used in wireless communication systems. As Field Programmable Gate Array (FPGA) become an increasingly attractive platform for wireless communication, it is important to understand the ...
Ali Khalid Jassim , Mohammad Hussein Ali, Musa Hadi Wali   +2 more
doaj  

Comprehensive Review on the Exploitation of Advanced Memory Optimization Strategies to Improve Performance for Convolutional and Spiking Neural Networks in Medical Imaging Using Hardware Accelerators

IEEE Access
Advanced memory optimization techniques are reviewed to enhance the performance of Convolutional Neural Networks (CNNs) and Spiking Neural Networks (SNNs) on hardware accelerators, addressing the real-world challenges in medical imaging.
N. Srikanth Prasad, S. Sundar
doaj   +1 more source

Histogram of oriented gradients front end processing: an FPGA based processor approach [PDF]

, 2014
The Field Programmable Gate Array (FPGA) implementation of the commonly used Histogram of Oriented Gradients (HOG) algorithm is explored. The HOG algorithm is employed to extract features for object detection. A key focus has been to explore the use of a
Bardak, Burak, Kelly, Colm, Siddiqui, Fahad Manzoor, Woods, Roger   +3 more
core   +1 more source

Fundamental Challenges, Physical Implementations, and Integration Strategies for Ising Machines in Large‐Scale Optimization Tasks

Advanced Electronic Materials, EarlyView.
Ising machines are emerging as specialized hardware solvers for computationally hard optimization problems. This review examines five major platforms—digital CMOS, analog CMOS, emerging devices, coherent optics, and quantum systems—highlighting physics‐rooted advantages and shared bottlenecks in scalability and connectivity.
Hyunjun Lee, Joon Pyo Kim, Sanghyeon Kim
wiley   +1 more source

FPGA as a tool for hardware realization of feedback control

Journal of Electrical Systems and Information Technology, 2015
The presented paper deals with the development of robust control algorithm based on reflection vectors methodology. This approach of controller design is guaranteeing stability, robustness and high performance.
Ján Cigánek, Michal Kocúr, Štefan Kozák   +2 more
doaj   +1 more source

PGPG: An Automatic Generator of Pipeline Design for Programmable GRAPE Systems [PDF]

, 2007
We have developed PGPG (Pipeline Generator for Programmable GRAPE), a software which generates the low-level design of the pipeline processor and communication software for FPGA-based computing engines (FBCEs).
Fukushige, Toshiyuki, Hamada, Tsuyoshi, Makino, Junichiro   +2 more
core   +2 more sources

Ultra‐Low Power Consumption and Highly Durability in Sm:HfO2 Thin Film Ferroelectric Memristor for Edge Detection

Advanced Electronic Materials, EarlyView.
ABSTRACT With the continuous development of computer image processing, developing efficient and low‐power computing devices has become a key challenge. Memristors have integrated in‐situ storage and computing capabilities, making them an ideal choice for low‐power image processing computing architectures. However, current memristors are confronted with
Tengyu Li, YongRui Wang, Weifeng Zhang, Jikang Xu, Xiaobing Yan   +4 more
wiley   +1 more source