Results 31 to 40 of about 47,684 (233)

Data Packet Processing Acceleration Architecture for Virtual Network Function Based on FPGA [PDF]

open access: yesJisuanji gongcheng, 2018
In order to improve the packet processing performance of Virtual Network Function(VNF),this paper comes up with a Field Programmable Gate Array(FPGA)-based General Hardware Accelerator(GHA) architecture.The GHA architecture implements the packet ...
FAN Hongwei,HU Yuxiang,LAN Julong
doaj   +1 more source

3D Large‐Scale Subwavelength‐Resolution Sound Sheet Tomography Based on an Active and Programmable Circular Meta‐Array

open access: yesAdvanced Science, EarlyView.
A programmable 2048‐element circular ultrasound array combined with a compact acoustic lens produces a thin “sound sheet” over a large field of view, and records echoes with wide angular diversity across the ring aperture. Coherence‐enhanced beamforming converts full‐matrix data into high‐contrast tomographic slices, delivering near‐diffraction‐limited
Qiu‐De Zhang   +11 more
wiley   +1 more source

Josephson Junction Model: FPGA Implementation and Chaos-Based Encryption of sEMG Signal through Image Encryption Technique

open access: yesComplexity, 2022
The field programmable gate array (FPGA) implementation of the nonlinear resistor-capacitor-inductor shunted Josephson junction (NRCISJJ) model and its application to sEMG (Surface ElectroMyoGraphic) signal encryption through image encrypted technique ...
Colince Welba   +6 more
doaj   +1 more source

Dataflow computation with intelligent memories emulated on field-programmable gate arrays (FPGAs) [PDF]

open access: yesMicroprocessors and Microsystems, 2002
Abstract This paper presents a new design that implements the data-driven (i.e. dataflow) computation paradigm with intelligent memories. Also, a relevant prototype that employs FPGAs is presented for the support of intelligent memory structures. Instead of giving the CPU the privileged right to decide what instructions to fetch in each cycle (as is ...
Segreen Ingersoll, Sotirios G. Ziavras
openaire   +1 more source

Fabrication of High‐Density Multimodal Neural Probes Based on Heterogeneously Integrated CMOS

open access: yesAdvanced Science, EarlyView.
A chiplet‐based methodology democratizes active neural probe development on standard bulk CMOS services. This yields the first probe combining high‐density electrophysiology (416 electrodes) with calcium imaging (832 photodiodes) and complete on‐chip signal processing across 13 shanks.
Ju Hee Mun   +10 more
wiley   +1 more source

Multiband Real-Time Coherent Optical OFDM Reception up to 110 Gb/s with 600-km Transmission

open access: yesIEEE Photonics Journal, 2010
We demonstrate field-programmable gate array (FPGA)-based multiband orthogonal frequency-division multiplexing (OFDM) signal reception after 600-km standard single-mode fiber (SSMF) transmission and 400-ps differential-group delay (DGD) at 110-Gb/s.
Simin Chen, Yiran Ma, William Shieh
doaj   +1 more source

A Correlative SICM‐OPM Platform for Surface and Volumetric Imaging in Live Cells

open access: yesAdvanced Science, EarlyView.
A multifunctional correlative imaging platform integrating Scanning Ion Conductance Microscopy (SICM) with Oblique Plane Microscopy (OPM) enables simultaneous surface topography, mechanical mapping, and 3D volumetric fluorescence imaging in live cells.
Wenzhi Hong   +13 more
wiley   +1 more source

Intelligent Motion Control for Four-Wheeled Holonomic Mobile Robots Using FPGA-Based Artificial Immune System Algorithm

open access: yesAdvances in Mechanical Engineering, 2013
This paper presents an intelligent motion controller for four-wheeled holonomic mobile robots with four driving omnidirectional wheels equally spaced at 90 degrees from one another by using field-programmable gate array (FPGA)-based artificial immune ...
Hsu-Chih Huang
doaj   +1 more source

Real-time FPGA-based Image Enhancement Using Histogram Projection Technique for Uncooled Infrared Imagers

open access: yesJournal of King Saud University: Engineering Sciences, 2009
Histogram projection (HP) is a well-suited enhancement technique for images obtained by uncooled infrared imagers. In this paper, the problem of implementing HP using Field Programmable Gate Array (FPGA) is addressed.The proposed system is implemented ...
A.M. Alsuwailem
doaj   +1 more source

Estudio de técnicas para multitarea HW sobre FPGAs Tridimensionales (FPGA3D) [PDF]

open access: yes, 2006
Este texto documenta el trabajo realizado por los autores para diseñar e implementar un simulador de FPGA 3D (Field Programmable Gate Array). Tras una introducción sobre aspectos generales del proyecto, se da una introducción sobre circuitos lógicos ...
Arbeteta Hernández, Ángel   +2 more
core   +1 more source

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