Results 161 to 170 of about 6,158 (207)
Some of the next articles are maybe not open access.

Optically Programmable Field Programmable Gate Arrays (FPGA) Systems

2004
Abstract : This report presents the results of research in the use of holographic modules in optoelectronic systems, their applications, and the characterization of polymer materials on which to record volume holograms for these modules. The first chapter makes the case that a direct interface between an optical memory and a chip integrating detectors ...
Demetri Psaltis   +2 more
openaire   +1 more source

Field Programmable Gate Array (FPGA) Based Microwave Oven

Applied Mechanics and Materials, 2019
In this paper, an FPGA-based microwave oven controller design which can be implemented using Altera DE1 development board is presented. The motivation for this work is to explore FPGA for real time applications. First, a microwave oven controller design architecture that could fit into Altera DE1 board, utilizing on-board peripherals is developed. Then,
Bhuvaneswari, Thangavel   +3 more
openaire   +1 more source

Field programmable gate array (FPGA) for iterative code evaluation

IEEE Transactions on Magnetics, 2006
Iterative codes such as low density parity check (LDPC) codes and turbo product codes (TPC) are of interest for data storage applications. To apply these codes to digital recording systems, two possible schemes are considered in this paper. In the first scheme, a single LDPC code of column weight j>2 is used to replace the Reed-Solomon (RS) code of the
null Lingyan Sun   +3 more
openaire   +1 more source

Asynchronous field-programmable gate arrays (FPGAs)

2019
Field-programmable gate arrays (FPGAs) are chips that can be electronically programmed to function as an arbitrary digital circuit or system. They were originally used to replace discrete gates in interface electronics, and over the past three decades have evolved to being used in the place of application-specific integrated circuits (ASICs) in low ...
openaire   +1 more source

Detection of Crosstalk Faults in Field Programmable Gate Arrays (FPGA)

Journal of The Institution of Engineers (India): Series B, 2014
In this work, a Built-in-Self-Test (BIST) technique has been proposed to detect crosstalk faults in FPGA and run time congestion and to provide the crosstalk aware router for FPGA. The proposed BIST circuits require less overhead as compared to earlier techniques. The proposed detector can detect any logic hazard or delay due to crosstalk.
N. Das, P. Roy, H. Rahaman
openaire   +1 more source

Field programmable gate arrays (FPGA)

2023
Bishwajeet Pandey, Keshav Kumar
openaire   +1 more source

Field-Programmable Gate Array (FPGA) Emulation for Computer Architecture

2009
Abstract : The scope of this program is to explore the use of FPGA-based systems for different applications including architecture-level FPGA emulation in support of future multiprocessor architecture research. We evaluate FPGA emulation approaches against conventional simulation techniques, and determine the missing capabilities that will require ...
K. Asanovic, J. Wawrzynek
openaire   +1 more source

Introduction to Field Programmable Gate Arrays (FPGA)

2022
Bekkay Hajji   +2 more
openaire   +1 more source

Field Programmable Gate Array (FPGA) Design Strategies and Applications

AIAA Infotech@Aerospace 2007 Conference and Exhibit, 2007
Configurable custom computing became practical with the introduction of in-circuit re-programmable devices such as Field Programmable Gate Arrays (FPGAs). FPGAs provide fine-grained logic and interconnection elements whose function users can program to meet an applications needs.
openaire   +1 more source

Field Programmable Gate Array (FPGA) Implementation of Digital Systems: An Alternative to ASIC

The Fifth International Conference on VLSI Design, 2005
Rapid prototyping and simulation of digital systems using mays of field programmable gate array (FPGA) chips is expected to be an important aspect of digital design and implementation. Four classes of architectures are discussed for connecting an array of FPGA chips and also logic blocks in a chip to achieve functionality and performance comparable to ...
openaire   +1 more source

Home - About - Disclaimer - Privacy