Results 171 to 180 of about 91,286 (241)

Clock Gating Implementation on commercial Field Programmable Gate Array (FPGA)

2018 4th International Conference on Electrical, Electronics and System Engineering (ICEESE), 2018
This paper discusses the application and implementation of clock gating technique to RISC32 (a customizable processor on Field Programmable Gate Array (FPGA)) for reduction of dynamic power consumption on clock tree. The FPGA used is Artix-7 (xc7a100tcsg324-1) from Xilinx with 28nm technology. The power consumption of clock tree is reduced by 24% after
Beng-Liong Tan, Wai-Kong Lee, Kai-Ming Mok, Hock-Guan Goh   +3 more
openaire   +1 more source

Field programmable gate array (FPGA) based baseline JPEG decoder

2000 TENCON Proceedings. Intelligent Systems and Technologies for the New Millennium (Cat. No.00CH37119), 2002
Image/video compression is one of the major components used in video-telephony, videoconferencing and multimedia-related applications. Compression allows efficient utilization of channel bandwidth and/or storage size. One of the commonly used methods for image and video compression is JPEG (an image compression standard).
Z.M. Yusof, Z. Aspar, I. Suleiman
openaire   +1 more source

Power Modelling in Field Programmable Gate Arrays (FPGA)

1999
This paper presents a power consumption model for FPGAs based on measurements. This model will permit us to optimize power consumption on FPGAs using existing architectures, as well as helping direct the design of new power-sensitive FPGA architectures.
Andrés Garcia, Wayne Burleson, Jean-Luc Danger   +2 more
openaire   +1 more source

Field Programmable Gate Array (FPGA) Based IoT for Smart City Applications

2021
In the present era of modernization, automation and intelligent systems have become an integral part of our lives. These intelligent systems extremely rely on parallel computing technology for computation. Field Programmable Gate Arrays (FPGAs) have recently become extremely popular because of its reconfigurability. FPGA, an integrated circuit designed
Anvit Negi, Sumit Raj, Surendrabikram Thapa, S. Indu   +3 more
openaire   +1 more source

Detection of Crosstalk Faults in Field Programmable Gate Arrays (FPGA)

Journal of The Institution of Engineers (India): Series B, 2014
In this work, a Built-in-Self-Test (BIST) technique has been proposed to detect crosstalk faults in FPGA and run time congestion and to provide the crosstalk aware router for FPGA. The proposed BIST circuits require less overhead as compared to earlier techniques. The proposed detector can detect any logic hazard or delay due to crosstalk.
N. Das, P. Roy, H. Rahaman
openaire   +1 more source

Asynchronous field-programmable gate arrays (FPGAs)

2019
Field-programmable gate arrays (FPGAs) are chips that can be electronically programmed to function as an arbitrary digital circuit or system. They were originally used to replace discrete gates in interface electronics, and over the past three decades have evolved to being used in the place of application-specific integrated circuits (ASICs) in low ...
openaire   +1 more source

Optimization of field-programmable gate array logic block architecture for speed

Proceedings of the IEEE Custom Integrated Circuits Conference, 1991
The authors explore the effect of the choice of logic block on the speed of a field-programmable gate array (FPGA). A set of logic circuits was implemented as FPGAs, each using a different logic block, and the speed of the implementation was measured ...
S. Singh, Jonathan Rose, D. Lewis, K. Chung, P. Chow   +4 more
semanticscholar   +1 more source

Scalable Hydrodynamics on multiple Field-Programmable Gate Arrays (FPGAs)

Proceedings of the SC '25 Workshops of the International Conference for High Performance Computing, Networking, Storage and Analysis
This paper presents scalable 2D and 3D Hydrodynamics solver implementations on FPGAs using Intel’s oneAPI framework, addressing challenges in porting stencil-based computations from CPU/GPU architectures on FPGAs.FPGAs offer customizable hardware with on-chip memory that can be custom-tailored for High Performance Computing (HPC) applications.
Mordant, François-Xavier, Prouveur, Charles, Tremblin, Pascal, Gac, Nicolas   +3 more
openaire   +2 more sources

Field Programmable Gate Array (FPGA) Design Strategies and Applications

AIAA Infotech@Aerospace 2007 Conference and Exhibit, 2007
Configurable custom computing became practical with the introduction of in-circuit re-programmable devices such as Field Programmable Gate Arrays (FPGAs). FPGAs provide fine-grained logic and interconnection elements whose function users can program to meet an applications needs.
openaire   +1 more source

Field-Programmable Gate Array (FPGA) Emulation for Computer Architecture

2009
Abstract : The scope of this program is to explore the use of FPGA-based systems for different applications including architecture-level FPGA emulation in support of future multiprocessor architecture research. We evaluate FPGA emulation approaches against conventional simulation techniques, and determine the missing capabilities that will require ...
K. Asanovic, J. Wawrzynek
openaire   +1 more source