Results 261 to 270 of about 10,771 (297)

Field-Programmable Gate Array

2021
Field-programmable gate arrays (FPGAs) are integrated circuits whose logic and their interconnections are configurable. These devices are field-programmable, that is, they can be configured by the hardware designer without any intervention of the manufacturer.
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On routability prediction for field-programmable gate arrays

Proceedings of the 30th international on Design automation conference - DAC '93, 1993
Efficient utilization of Field Programmable Gate Arrays (FPGAs) depends on the ability to determine whether designs will exceed the logic or routing capacities of the devices. Here, we focus on the problem of assessing the routability of designs for FPGAs before place-and-route.
Pak K. Chan, Martine D. F. Schlag, Jason Y. Zien   +2 more
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Activity Estimation for Field-Programmable Gate Arrays

2006 International Conference on Field Programmable Logic and Applications, 2006
This paper examines various activity estimation techniques in order to determine which are most appropriate for use in the context of field-programmable gate arrays (FPGAs). Specifically, the paper compares how different activity estimation techniques affect the accuracy of FPGA power models and the ability of power-aware FPGA CAD tools to minimize ...
Julien Lamoureux, Steven J. E. Wilton
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Synthesis method for field programmable gate arrays

Proceedings of the IEEE, 1993
Logic synthesis algorithms and methods for field-programmable gate arrays (FPGAs) are reviewed. The three most popular types of FPGA architectures are considered, namely, those using logic blocks based on lookup-tables, multiplexers, and wide AND/OR arrays, respectively.
Alberto L. Sangiovanni-Vincentelli, Abbas El Gamal, Jonathan Rose   +2 more
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Field Programmable Gate Arrays

2019
The chapter deals with field-programmable gate arrays (FPGA). The basic stages are shown concerning evolution of programmable logic (from PROMs and PLAs to FPGAs). Next, the evolution of FPGAs is analysed. Three ages of FPGAs are shown. Next, the modern FPGAs produced by Xilinx and Intel (Altera) The last section is devoted to design methods targeting ...
Alexander Barkalov, Larysa Titarenko, Małgorzata Mazurkiewicz   +2 more
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Logic synthesis for field-programmable gate arrays

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1994
In this paper, we consider the problem of configuring Field Programmable Gate Arrays (FPGA's) so that some given function is computed by the device. Obtaining the information necessary to configure a FPGA entails both logic synthesis and logic embedding.
TingTing Hwang, Robert Michael Owens, Mary Jane Irwin, Kuo-Hua Wang   +3 more
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Implementing division with field programmable gate arrays

Journal of VLSI signal processing systems for signal, image and video technology, 1994
This article presents a method to map digit-recurrence arithmetic algorithms to lookup-table based Field Programmable Gate Arrays (FPGAs). By reducing the number of binary inputs to combinational logic and merging algorithm steps, the strategy creates new simplified functions to decrease logic depth and area.
Marianne E. Louie, Milos D. Ercegovac
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Reconfigurable processing with field programmable gate arrays

Proceedings of International Conference on Application Specific Systems, Architectures and Processors: ASAP '96, 2002
In-system-programmable, SRAM-based Field Programmable Gate Arrays (FPGAs) can be used to create processors and coprocessors whose internal architecture as well as interconnections can be reconfigured to match the needs of a given application. Exploiting the inherent speed and parallelism of a hardware solution, FPGA-based coprocessors can execute ...
Bradly K. Fawcett, J. Watson
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RSA Acceleration with Field Programmable Gate Arrays

1999
An efficient implementations of modular exponentiation, i.e., the main building block in the RSA cryptographic scheme, is achieved by first designing a bit-level systolic array such that the whole procedure of modular exponentiation can be carried out entirely by a single unit without using global interconnections or memory to store intermediate ...
Alexander Tiountchik, Elena Trichina
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Parallel placement for field-programmable gate arrays

Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays - FPGA '03, 2003
Placement and routing are the most time-consuming processes in automatically synthesizing and configuring circuits for field-programmable gate arrays (FPGAs). In this paper, we use the negotiation-based paradigm to parallelize placement. Our new FPGA placer, NAP (Negotiated Analytical Placement), uses an analytical technique for coarse placement and ...
Pak K. Chan, Martine D. F. Schlag
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