Results 321 to 330 of about 649,732 (345)

Architecture of field-programmable gate arrays

Proceedings of the IEEE, 1993
A survey of field-programmable gate array (FPGA) architectures and the programming technologies used to customize them is presented. Programming technologies are compared on the basis of their volatility, size parasitic capacitance, resistance, and ...
Jonathan Rose, A. Gamal, A. Sangiovanni-Vincentelli   +2 more
semanticscholar   +1 more source

Wiring requirement and three-dimensional integration technology for field programmable gate arrays

IEEE Transactions on Very Large Scale Integration (vlsi) Systems, 2003
In this paper, analytical models for predicting interconnect requirements in field-programmable gate arrays (FPGAs) are presented, and opportunities for three-dimensional (3-D) implementation of FPGAs are examined.
Arifur Rahman, Shamik Das, A. Chandrakasan, R. Reif   +3 more
semanticscholar   +1 more source

Field programmable gate arrays and floating point arithmetic

IEEE Transactions on Very Large Scale Integration (vlsi) Systems, 1994
We present empirical results describing the implementation of an IEEE Standard 754 compliant floating-point adder/multiplier using field programmable gate arrays. The use of FPGA's permits fast and accurate quantitative evaluation of a variety of circuit
B. Fagin, C. Renard
semanticscholar   +1 more source

Hardware implementation of an artificial neural network using field programmable gate arrays (FPGA's)

IEEE transactions on industrial electronics (1982. Print), 1994
In this paper, the authors present a hardware implementation of a fully digital multilayer perceptron artificial neural network using Xilinx Field Programmable Gate Arrays (FPGAs).
N. M. Botros, M. Abdul-Aziz
semanticscholar   +1 more source

PARBIT: A Tool to Transform Bitfiles to Implement Partial Reconfiguration of Field Programmable Gate Arrays (FPGAs)

, 2001
Field Programmable Gate Arrays (FPGAs) can be partially reconfigured to implement Dynamically loadable Hardware Plugin (DHP) modules. A tool called PARBIT has been developed that transforms FPGA configuration bitfiles to enable DHP modules.
E. Horta, J. Lockwood
semanticscholar   +1 more source

Secure configuration of Field Programmable Gate arrays

, 2001
Although SRAM programmed Field Programmable Gate Arrays (FPGA's) have come to dominate the industry due to their density and performance advantages over non-volatile technologies they have a serious weakness in that they are vulnerable to piracy and ...
T. Kean
semanticscholar   +1 more source

Detecting, diagnosing, and tolerating faults in SRAM-based field programmable gate arrays: a survey

IEEE Transactions on Very Large Scale Integration (vlsi) Systems, 2003
Topics related to the faults in SRAM-based field programmable gate arrays (FPGAs) have been intensively studied in recent research studies. These topics include FPGA fault detection, FPGA fault diagnosis, FPGA defect tolerance, and FPGA fault tolerance ...
A. Doumar, Hideo Ito
semanticscholar   +1 more source

Antifuse field programmable gate arrays

Proceedings of the IEEE, 1993
An antifuse is an electrically programmable two-terminal device with small area and low parasitic resistance and capacitance. Field-programmable gate arrays (FPGAs) using antifuses in a segmented channel routing architecture now offer the digital logic ...
J. Greene, E. Hamdy, S. Beal
semanticscholar   +1 more source

The yield enhancement of field-programmable gate arrays

IEEE Transactions on Very Large Scale Integration (vlsi) Systems, 1994
The fine granularity and reconfigurable nature of field-programmable gate arrays (FPGA's) suggest that defect-tolerant methods can be readily applied to these devices in order to increase their maximum economic sizes, through increased yield.
N. Howard, A. Tyrrell, N. Allinson
semanticscholar   +1 more source

Digital Signal Processing with Field Programmable Gate Arrays

, 2001
Uwe Meyer-Baese
semanticscholar   +1 more source