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A new flip-flop gate based on floating gates
(ICEEE). 1st International Conference on Electrical and Electronics Engineering, 2004., 2005This paper proposes a new family of CMOS latches based on floating gate inputs. The main goal of this logic family is to achieve low area and low power requirements. A comparison of this Iogic family with logic families based on pass transistors or standard CMOS is included in this paper.
L. Fortino +3 more
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A Continuous MVL Gate using Pseudo Floating-Gate
2007 14th International Conference on Mixed Design of Integrated Circuits and Systems, 2007In this paper we present a multiple-valued gate using pseudo floating-gate. One of the key advantages is the possibility to operate this gate in continuous mode. The avoidance of recharging the floating-gate (recharge-signal) is shown to be quite liberating and to possess new and powerful qualities. Simulation results are provided.
O. Mirmotahari, J. Lomsdalen, Y. Berg
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Physica Scripta
Abstract The compact modeling of flash memories is crucial for integrated circuit designers to carry out efficient and precise circuit-level evaluations, particularly in the case of 3D NAND flash where the 3D geometry leads to significant parasitic coupling impacts on performance.
Afiq Hamzah +4 more
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Abstract The compact modeling of flash memories is crucial for integrated circuit designers to carry out efficient and precise circuit-level evaluations, particularly in the case of 3D NAND flash where the 3D geometry leads to significant parasitic coupling impacts on performance.
Afiq Hamzah +4 more
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Radiation effects on floating-gate memory cells
IEEE Transactions on Nuclear Science, 2001We have addressed the problem of threshold voltage (V/sub TH/) variation in flash memory cells after heavy-ion irradiation by using specially designed array structures and test instruments. After irradiation, low V/sub TH/ tails appear in V/sub TH/ distributions, growing with ion linear energy transfer (LET) and fluence.
CELLERE G. +6 more
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Programmable Switched-Current Floating-Gate Cells
2005 IEEE International Symposium on Circuits and Systems, 2005The concept of programmable switched-current floating-gate (PSIFG) cells is presented. A floating-gate current mirror provides programmability while a switched current element offers discrete time operation within the analogue domain. The concept is demonstrated by a circuit that implements a second-order FIR filter with arbitrary, programmable ...
Phil Corbishley +1 more
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Probability analysis for CMOS floating gate faults
Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC, 2002The electrical behavior of a floating gate MOS transistor is mask-topology-dependent, i.e. floating on different sites of interconnection may result in different fault behavior. In this paper, we present a net-oriented deterministic approach to compute the probability of different open faults on each net, by taking into account the process defect ...
Xue, H., Di, C., Jess, J.A.G.
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An analog floating-gate node for Supervised learning
IEEE Transactions on Circuits and Systems I: Regular Papers, 2005We present an improved analog floating-gate pFET synapse that implements a supervised learning algorithm similar to the least mean square (LMS) learning rule. Weight decay plays a key role in several learning rules; this floating-gate synapse exhibits this behavior.
Paul E. Hasler, Jeff Dugger
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Tunable floating-gate low-voltage transconductor
2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353), 2003Presents a six transistor fully differential dual-ended low-voltage (ULV) FGUVMOS operational transconductance amplifier (FGUVMOS-OTA), and a Gm-C filter where the FGUVMOS-OTA is used. The OTA has rail-to-rail operation. A basic Gm-C filter implemented with the OTA is presented.
Øivind Næss, Yngvar Berg
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Application performance of elements in a floating-gate FPAA
2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512), 2004Field-programmable analog arrays (FPAAs) provide a method for rapidly prototyping analog systems. Currently available commercial and academic FPAAs are typically based on operational amplifiers (or other similar analog primitives) with only a few computational elements per chip.
Tyson S. Hall +3 more
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Science, 2019
Device Technology Digital implementations of artificial neural networks perform many tasks, such as image recognition and language processing, but are too energy intensive for many applications. Analog circuits that use large crossbar arrays of synaptic memory elements represent a low-power alternative, but most devices cannot update the synaptic ...
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Device Technology Digital implementations of artificial neural networks perform many tasks, such as image recognition and language processing, but are too energy intensive for many applications. Analog circuits that use large crossbar arrays of synaptic memory elements represent a low-power alternative, but most devices cannot update the synaptic ...
openaire +1 more source