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Simulator Semantics for System Level Formal Verification [PDF]
Electronic Proceedings in Theoretical Computer Science, 2015 Many simulation based Bounded Model Checking approaches to System Level Formal Verification (SLFV) have been devised. Typically such approaches exploit the capability of simulators to save computation time by saving and restoring the state of the system ...
Toni Mancini +4 more
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A model-based approach to automation of formal verification of ROS 2-based systems [PDF]
Frontiers in Robotics and AIFormal verification of robotic applications, particularly those based on ROS 2, is desirable for ensuring correctness and safety. However, the complexity of formal methods and the manual effort required for model creation and parameter extraction often ...
Lukas Dust +4 more
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Formal Verification of an Iterative Low-Power x86 Floating-Point Multiplier with Redundant Feedback [PDF]
Electronic Proceedings in Theoretical Computer Science, 2011 We present the formal verification of a low-power x86 floating-point multiplier. The multiplier operates iteratively and feeds back intermediate results in redundant representation. It supports x87 and SSE instructions in various precisions and can block
Peter-Michael Seidel
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A Probabilistic Transformation of Distance-Based Outliers
Machine Learning and Knowledge Extraction, 2023 The scores of distance-based outlier detection methods are difficult to interpret, and it is challenging to determine a suitable cut-off threshold between normal and outlier data points without additional context.
David Muhr +2 more
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Linear Encodings of Bounded LTL Model Checking [PDF]
Logical Methods in Computer Science, 2006 We consider the problem of bounded model checking (BMC) for linear temporal logic (LTL). We present several efficient encodings that have size linear in the bound.
Armin Biere +4 more
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Model‐based validation of diagnostic software with application in automotive systems
IET Cyber-systems and Robotics, 2021 Software validation aims to ensure that a particular software product fulfils its intended purpose, and needs to be performed against both software requirement as well as its implementation (i.e. product). However, for diagnostic software (i.e.
Jun Chen, Ramesh S
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Automatic Formal Specification and Its Verification of Assembly-Level Sequential Statement Blocks [PDF]
Jisuanji gongcheng, 2019 Formal verification of software is an important means to guarantee the provability,reliability and security of software, but the generation process of traditional formal verification script is complex and requires a lot of manual verification of formal ...
QI Longyun, Lü Xiaoliang, LU Hong, HUANG Hao
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A Vision of Collaborative Verification-Driven Engineering of Hybrid Systems [PDF]
, 2013 . Hybrid systems with both discrete and continuous dynamics are an important model for real-world physical systems. The key challenge is how to ensure their correct functioning w.r.t. safety requirements.
Mitsch, Stefan +2 more
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Formal Verification, Engineering and Business Value [PDF]
Electronic Proceedings in Theoretical Computer Science, 2012 How to apply automated verification technology such as model checking and static program analysis to millions of lines of embedded C/C++ code? How to package this technology in a way that it can be used by software developers and engineers, who might ...
Ralf Huuck
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Formal Verification of Fault-Tolerant Hardware Designs
IEEE Access, 2023 Digital circuits for space applications can suffer from operation failures due to radiation effects. Error detection and mitigation techniques are widely accepted solutions to improve dependability of digital circuits under Single Event Upsets (SEUs) and
Luis Entrena +6 more
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