Results 11 to 20 of about 384,291 (294)
Understanding the Potential of FPGA-based Spatial Acceleration for Large Language Model Inference [PDF]
ACM Transactions on Reconfigurable Technology and Systems, 2023 Recent advancements in large language models (LLMs) boasting billions of parameters have generated a significant demand for efficient deployment in inference workloads.
Hongzheng Chen +7 more
semanticscholar +1 more source
FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption [PDF]
International Symposium on High-Performance Computer Architecture, 2022 Fully Homomorphic Encryption (FHE) offers protection to private data on third-party cloud servers by allowing computations on the data in encrypted form.
R. Agrawal +7 more
semanticscholar +1 more source
Computing in Science & Engineering, 2021 As cloud computing grows, the types of computational hardware available in the cloud are diversifying. Field Programmable Gate Arrays (FPGAs) are a relatively new addition to high-performance computing in the cloud, with the ability to accelerate a range of different applications, and the flexibility to offer different cloud computing models.
Miriam Leeser +2 more
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FPGA IMPLEMENTATIONS OF NEURAL NETWORKS
Universum:Technical sciences, 2023 This introductory chapter reviews the basics of artificial-neural-network theory, discusses various aspects of the hardware implementation of neural networks (in both ASIC and FPGA technologies, with a focus on special features of artificial neural ...
A. Omondi, Jagath Rajapakse
semanticscholar +1 more source
OmpSs@FPGA framework for high performance FPGA computing [PDF]
IEEE Transactions on Computers, 2021 This paper presents the new features of the OmpSs@FPGA framework. OmpSs is a data-flow programming model that supports task nesting and dependencies to target asynchronous parallelism and heterogeneity. OmpSs@FPGA is the extension of the programming model addressed specifically to FPGAs.
Haro Ruiz, Juan Miguel de +8 more
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Sparse and dense matrix multiplication hardware for heterogeneous multi-precision neural networks
Array, 2021 In this paper, we present hardware accelerators created with high-level synthesis techniques for sparse and dense matrix multiplication operations. The cores can operate with different precisions and are designed to be integrated in a heterogeneous CPU ...
Jose Nunez-Yanez, Mohammad Hosseinabady
doaj +1 more source
High speed national secret SM4 optical fiber communication system scheme based on FPGA
网络与信息安全学报, 2023 With the increasing use of optical fiber communication technology in the Industrial Internet of Things, cryptographic algorithms play a crucial role in ensuring the security of data transmission in embedded device environments.The SM4 packet cipher ...
Peiyu HUANG, Jiabo SONG, Yangfan JIA
doaj +1 more source
FPGA HLS Today: Successes, Challenges, and Opportunities
ACM Transactions on Reconfigurable Technology and Systems, 2022 The year 2011 marked an important transition for FPGA high-level synthesis (HLS), as it went from prototyping to deployment. A decade later, in this article, we assess the progress of the deployment of HLS technology and highlight the successes in ...
J. Cong +6 more
semanticscholar +1 more source
Transfer of Analogies in Traditional Programming Languages to Teaching VHDL
Sakarya University Journal of Computer and Information Sciences, 2022 One of the languages available to describe a digital system in FPGA is the VHDL language. Since programming in hardware requires a different way of thinking than developing software, the students face some difficulties when trying to design in VHDL ...
Ali Gülbağ, Halit Öztekin
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Application Acceleration on FPGAs with OmpSs@FPGA [PDF]
2018 International Conference on Field-Programmable Technology (FPT), 2018 OmpSs@FPGA is the flavor of OmpSs that allows offloading application functionality to FPGAs. Similarly to OpenMP, it is based on compiler directives. While the OpenMP specification also includes support for heterogeneous execution, we use OmpSs and OmpSs@FPGA as prototype implementation to develop new ideas for OpenMP. OmpSs@FPGA implements the tasking
Bosch, Jaume +9 more
openaire +3 more sources