Results 21 to 30 of about 107,341 (255)
FPGA Implementation of a General Space Vector Approach on a 6-Leg Voltage Source Inverter [PDF]
A general algorithm of a Space Vector approach is implemented on a 6-leg VSI controlling a PM synchronous machine with three independent phases. In this last case, the necessity of controlling the zero-sequence current motivates the choice of a special ...
COLAS, Frédéric +13 more
core +1 more source
Design of FPGA online loading based on Flash controller
Traditional way of FPGA configuration file update is using development tools to write FPGA target code to storage devices such as Nor Flash through the JTAG way.However,when the system becomes complicated with multiple FPGA,it takes a long time to update
Lin Tianjing, Ruan Xiang, Liu Chun
doaj +1 more source
Rendering PostScriptTM fonts on FPGAs [PDF]
This paper describes how custom computing machines can be used to implement a simple outline font processor. An FPGA based co-processor is used to accelerate the compute intensive portions of font rendering.
Singh, S., Patterson, J., MacVicar, D.
core +1 more source
Caffeinated FPGAs: FPGA framework For Convolutional Neural Networks [PDF]
Convolutional Neural Networks (CNNs) have gained significant traction in the field of machine learning, particularly due to their high accuracy in visual recognition. Recent works have pushed the performance of GPU implementations of CNNs to significantly improve their classification and training times.
Roberto DiCecco +5 more
openaire +3 more sources
Implementation and applications of tri-state self organising maps on FPGA [PDF]
This is the post-print version of the Article. The official published version can be accessed from the link below - Copyright @ 2012 IEEEThis paper introduces a tri-state logic self-organizing map (bSOM) designed and implemented on a field programmable ...
Meng, Hongying +7 more
core +1 more source
FPGA-Based Realization of Self-Optimizing Drive-Controllers [PDF]
Paiz C, Hagemeyer J, Pohl C, et al. FPGA-Based Realization of Self-Optimizing Drive-Controllers. In: IEEE Industrial Electronics Society, Institute of Electrical and Electronics Engineers, Keisoku-jidō-seigyō-gakkai, Universidade do Porto, eds.
Keisoku-jidō-seigyō-gakkai +19 more
core +1 more source
A C++-embedded Domain-Specific Language for programming the MORA soft processor array [PDF]
MORA is a novel platform for high-level FPGA programming of streaming vector and matrix operations, aimed at multimedia applications. It consists of soft array of pipelined low-complexity SIMD processors-in-memory (PIM).
Purohit, S. +7 more
core +1 more source
An area-efficient 2-D convolution implementation on FPGA for space applications [PDF]
The 2-D Convolution is an algorithm widely used in image and video processing. Although its computation is simple, its implementation requires a high computational power and an intensive use of memory.
Stefano Di Carlo +11 more
core +1 more source
Hardware acceleration of number theoretic transform for zk‐SNARK
An FPGA‐based hardware accelerator with a multi‐level pipeline is designed to support the large‐bitwidth and large‐scale NTT tasks in zk‐SNARK. It can be flexibly scaled to different scales of FPGAs and has been equipped in the heterogeneous acceleration system with the help of HLS and OpenCL.
Haixu Zhao +6 more
wiley +1 more source
In human speech, the timing function is important for determining its duration, stress and rhythm; however, little attention has been paid to these issues when building a speech synthesis system. In the human brain, the cerebellum plays a key role in the
Vo Nhu Thanh, Hideyuki Sawada
doaj +1 more source

