Results 21 to 30 of about 111,958 (254)
FPGA-Based Realization of Self-Optimizing Drive-Controllers [PDF]
, 2009 Paiz C, Hagemeyer J, Pohl C, et al. FPGA-Based Realization of Self-Optimizing Drive-Controllers. In: IEEE Industrial Electronics Society, Institute of Electrical and Electronics Engineers, Keisoku-jidō-seigyō-gakkai, Universidade do Porto, eds.
Keisoku-jidō-seigyō-gakkai +19 more
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A framework for FPGA functional units in high performance computing [PDF]
, 2010 FPGAs make it practical to speed up a program by defining hardware functional units that perform calculations faster than can be achieved in software. Specialised digital circuits avoid the overhead of executing sequences of instructions, and they make
O'Donnell, J.T. +3 more
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Rendering PostScriptTM fonts on FPGAs [PDF]
, 1999 This paper describes how custom computing machines can be used to implement a simple outline font processor. An FPGA based co-processor is used to accelerate the compute intensive portions of font rendering.
Singh, S., Patterson, J., MacVicar, D.
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Caffeinated FPGAs: FPGA framework For Convolutional Neural Networks [PDF]
2016 International Conference on Field-Programmable Technology (FPT), 2016 Convolutional Neural Networks (CNNs) have gained significant traction in the field of machine learning, particularly due to their high accuracy in visual recognition. Recent works have pushed the performance of GPU implementations of CNNs to significantly improve their classification and training times.
Roberto DiCecco +5 more
openaire +3 more sources
An area-efficient 2-D convolution implementation on FPGA for space applications [PDF]
, 2011 The 2-D Convolution is an algorithm widely used in image and video processing. Although its computation is simple, its implementation requires a high computational power and an intensive use of memory.
Stefano Di Carlo +11 more
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GRAph Parallel Actor Language: A Programming Language for Parallel Graph Algorithms [PDF]
, 2013 We introduce a domain-specific language, GRAph Parallel Actor Language, that enables parallel graph algorithms to be written in a natural, high-level form.
DeLorimier, Michael John
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Flexible FPGA-Based Controller Architecture for Five-fingered Dexterous Robot Hand with Effective Impedance Control [PDF]
, 2009 Several practical issues associated with achieving effective impedance performance in the finger joint space and stable grasping on a five-fingered dexterous hand are investigated in this work.
Z. X. Xue +17 more
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Connection Science, 2018 In human speech, the timing function is important for determining its duration, stress and rhythm; however, little attention has been paid to these issues when building a speech synthesis system. In the human brain, the cerebellum plays a key role in the
Vo Nhu Thanh, Hideyuki Sawada
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A C++-embedded Domain-Specific Language for programming the MORA soft processor array [PDF]
, 2010 MORA is a novel platform for high-level FPGA programming of streaming vector and matrix operations, aimed at multimedia applications. It consists of soft array of pipelined low-complexity SIMD processors-in-memory (PIM).
Purohit, S. +7 more
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Real time implementation of separating overlapped algorithm for dual array ADS-B signal
Dianzi Jishu Yingyong, 2020 In order to solve the problem of signal overlapping when communicating in ADS-B system, combined with the working characteristics of FPGA and the requirements of real-time system, the ADS-B overlapping detection algorithm and separating overlapped ...
Hu Tieqiao, Han Bin
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