Results 21 to 30 of about 246,901 (236)
The advancement of cluster based FPGA place & route technic [PDF]
MATEC Web of Conferences, 2020 As one of the core components of electronic hardware systems, Field Programmable Logic Array (FPGA) device design technology continues to advance under the guidance of electronic information technology policies, and has made information technology ...
Zhou Zhimei +5 more
doaj +1 more source
Novel hybrid strong and weak PUF design based on FPGA
网络与信息安全学报, 2021 Physically unclonable function (PUF) can produce intrinsic keys with characteristics of randomness, uniqueness and tamper-proof by exploiting the process deviations which can not be avoided in the chip manufacturing process.
LIAN Jiana +2 more
doaj +1 more source
Enhancing functional safety in FPGA-based motor drives
The Journal of Engineering, 2019 Motor control applications using small fast-spinning motors, and the advent of SiC and GaN switching transistors, are driving a need for compact drives with high-frequency control loop updates.
Benjamin Peter Jeppesen +2 more
doaj +1 more source
Constructing cluster of simple FPGA boards for cryptologic computations [PDF]
, 2012 In this paper, we propose an FPGA cluster infrastructure, which can be utilized in implementing cryptanalytic attacks and accelerating cryptographic operations.
Doroz, Yarkin +3 more
core +1 more source
Dynamic reconfiguration technologies based on FPGA in software defined radio system [PDF]
, 2011 Partial Reconfiguration (PR) is a method for Field Programmable Gate Array (FPGA) designs which allows multiple applications to time-share a portion of an FPGA while the rest of the device continues to operate unaffected.
Ke He +3 more
core +2 more sources
Synthesis of parallel adders from if-decision diagrams
Системный анализ и прикладная информатика, 2020 Addition is one of the timing critical operations in most of modern processing units. For decades, extensive research has been done devoted to designing higher speed and less complex adder architectures, and to developing advanced adder implementation ...
A. A. Prihozhy
doaj +1 more source
System noise of a digital pulse processing module for nuclear instrumentation [PDF]
EPJ Web of Conferences, 2020 Digital pulse processing finds a widespeed use in nuclear instrumentation. This work presents a digital pulse processing (DPP) module based on an FPGA and a 16-bit 125 MHz ADC and analyses the system noise distribution by acquired digital data using this
Ma Y +4 more
doaj +1 more source
Effects of FPGA architecture on FPGA routing [PDF]
Proceedings of the 32nd ACM/IEEE conference on Design automation conference - DAC '95, 1995 Although many traditional Mask Programmed Gate Array (MPGA) algorithms can be applied to FPGA routing, FPGA architectures impose critical constraints and provide alternative views of the routing problem that allow innovative new algorithms to be applied.
openaire +1 more source
SVITE: A Spike-Based VITE Neuro-Inspired Robot Controller [PDF]
, 2013 This paper presents an implementation of a neuro-inspired algorithm called VITE (Vector Integration To End Point) in FPGA in the spikes domain. VITE aims to generate a non-planned trajectory for reaching tasks in robots. The algorithm has been adapted
Domínguez Morales, Manuel Jesús +4 more
core +1 more source
Análisis de desempeño de capas de CNN para arquitecturas heterog´eneas basadas en FPGAs usando HLS
Ingeniería, 2020 Contexto: Las redes neuronales convolucionales (CNNs) son actualmente utilizadas en una amplia gama de aplicaciones de inteligencia artificial. En muchos casos, dichas aplicaciones requieren la ejecución de las redes en tiempo real en dispositivos ...
Mateo Guerra Londono +4 more
doaj +1 more source