Hardware design of convolution calculation module based on systolic array
Dianzi Jishu Yingyong, 2020 Aiming at the long broadcast, much fan in/fan out data path problem brought by high parullelism in the process of the Field Programmable Gate Array(FPGA) to realize the convolution computation in convolutional neural network, this paper adopts pulse ...
Wang Chunlin, Tan Kejun
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Throughput analysis for a high-performance FPGA-accelerated real-time search application [PDF]
, 2012 We propose an FPGA design for the relevancy computation part of a high-throughput real-time search application. The application matches terms in a stream of documents against a static profile, held in off-chip memory.
Chalamalasetti, S.R. +2 more
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Connection Science, 2018 In human speech, the timing function is important for determining its duration, stress and rhythm; however, little attention has been paid to these issues when building a speech synthesis system. In the human brain, the cerebellum plays a key role in the
Vo Nhu Thanh, Hideyuki Sawada
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Design and implementation of dark channel white balance algorithm based on FPGA
Dianzi Jishu Yingyong, 2021 In order to ensure the real-time performance of the system and solve the problem that the perfect reflection method fails in the exposure environment, this paper proposes an FPGA-based dark channel automatic white balance correction algorithm.
Wang Chao, Zhen Guoyong, Shan Yanhu
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Performance comparison of single-precision SPICE Model-Evaluation on FPGA, GPU, Cell, and multi-core processors [PDF]
, 2009 Automated code generation and performance tuning techniques for concurrent architectures such as GPUs, Cell and FPGAs can provide integer factor speedups over multi-core processor organizations for data-parallel, floating-point computation in SPICE model-
DeHon, André, Kapre, Nachiket
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Design and implementation of HIAF-Kicker power supply communication system
He jishu, 2021 BackgroundIn the injection and extraction Kicker power supply system of High Intensity Heavy-ion Accelerator Facility (HIAF), the transmission efficiency and stability of the control event directly affect the working performance of the power supply ...
LIU Yan +7 more
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MP-STREAM: A Memory Performance Benchmark for Design Space Exploration on Heterogeneous HPC Devices [PDF]
, 2018 Sustained memory throughput is a key determinant of performance in HPC devices. Having an accurate estimate of this parameter is essential for manual or automated design space exploration for any HPC device.
Nabi, Syed Waqar, Vanderbauwhede, Wim
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Realization of SRRC filter and multi-rate conversion based on FPGA
Dianzi Jishu Yingyong, 2018 In order to eliminate the inter symbol interference(ISI) in the communication system and improve the band utilization, the square root-raised cosine filter is often used to realize the base-band shaping filter of the baseband signal.
Yang Yang +3 more
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Software-defined protocol independent parser based on FPGA
网络与信息安全学报, 2020 With the boom of information technology, heterogeneous networks with various functions emerge in endlessly, heterogeneous fusion network has become the inevitable trend of the development of the next generation network.
MIAO Lixin, LIU Qinrang, WANG Xin
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Comparison of neutron/gamma separation qualities of various organic scintillation materials [PDF]
EPJ Web of Conferences, 2020 In this work we compare the pulse-shape discrimination (PSD) properties of EJ-299-33A, BC-501A, stilbene, p-terphenyl and Hidex Aqualight in neutron field generated by the LVR-15 reactor with silicon filter utilization.
Matěj Zdeněk +8 more
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