Analysis of application of FPGA technologies in IoT
Авіаційно-космічна техніка та технологіяThe subject of study in this article and work is the modern technologies of programmable logic devices (PLD) classified as FPGA, and the peculiarities of its application in Internet-of-Things domain at different architectural layers of the implementation,
Vitaliy Kulanov, Artem Perepelitsyn
doaj +1 more source
SVITE: A Spike-Based VITE Neuro-Inspired Robot Controller [PDF]
, 2013 This paper presents an implementation of a neuro-inspired algorithm called VITE (Vector Integration To End Point) in FPGA in the spikes domain. VITE aims to generate a non-planned trajectory for reaching tasks in robots. The algorithm has been adapted
Domínguez Morales, Manuel Jesús +4 more
core +1 more source
Optimization on fixed low latency implementation of GBT protocol in FPGA
, 2016 In the upgrade of ATLAS experiment, the front-end electronics components are subjected to a large radiation background. Meanwhile high speed optical links are required for the data transmission between the on-detector and off-detector electronics.
Chen, Hucheng +4 more
core +1 more source
Towards Lattice Quantum Chromodynamics on FPGA devices [PDF]
, 2019 In this paper we describe a single-node, double precision Field Programmable Gate Array (FPGA) implementation of the Conjugate Gradient algorithm in the context of Lattice Quantum Chromodynamics.
Korcyl, Grzegorz, Korcyl, Piotr
core +2 more sources
Boosting the Performance of PC-based Software Routers with FPGA-enhanced Network Interface Cards [PDF]
, 2006 The research community is devoting increasing attention to software routers based on off-the-shelf hardware and open-source operating systems running on the personalcomputer (PC) architecture.
Bianco, Andrea +8 more
core +3 more sources
High performance FPGA implementation of the mersenne twister [PDF]
, 2008 Efficient generation of random and pseudorandom sequences is of great importance to a number of applications [4]. In this paper, an efficient implementation of the Mersenne Twister is presented. The proposed architecture has the smallest footprint of all
Amira, A, Chandrasekaran, S
core +1 more source
SqueezeJet: High-level Synthesis Accelerator Design for Deep Convolutional Neural Networks
, 2018 Deep convolutional neural networks have dominated the pattern recognition scene by providing much more accurate solutions in computer vision problems such as object recognition and object detection.
Mousouliotis, Panagiotis G. +1 more
core +1 more source
A High performance and low cost hardware arcitecture for H.264 transform and quantization algorithms [PDF]
, 2005 In this paper, we present a high performance and low cost hardware architecture for real-time implementation of forward transform and quantization and inverse transform and quantization algorithms used in H.264 / MPEG4 Part 10 video coding standard.
Hamzaoglu, Ilker +3 more
core +1 more source
FPGA Design Techniques for Stable Cryogenic Operation
, 2017 In this paper we show how a deep-submicron FPGA can be modified to operate at extremely low temperatures through modifications in the supporting hardware and in the firmware programming it.
Charbon, Edoardo +3 more
core
Time-Shared Execution of Realtime Computer Vision Pipelines by Dynamic Partial Reconfiguration
, 2018 This paper presents an FPGA runtime framework that demonstrates the feasibility of using dynamic partial reconfiguration (DPR) for time-sharing an FPGA by multiple realtime computer vision pipelines.
Hoe, James C., Nguyen, Marie
core +1 more source