Design of high-performance, accurate, and approximate Dadda-tree multipliers for image processing applications. [PDF]
Rather AA +3 more
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Efficient computation and design of high speed double precision Vedic multiplier architecture. [PDF]
Kumar AS +5 more
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Modified vedic multiplier architecture using Nikhilam and Karatsuba algorithms with hybrid adders for enhanced performance. [PDF]
A S, A S.
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A multi-functional synthetic gene network: a frequency multiplier, oscillator and switch. [PDF]
Purcell O +3 more
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Pipelined and conflict-free number theoretic transform accelerator for CRYSTALS-Kyber on FPGA. [PDF]
Waris A, Aziz A, Khan BM.
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From Wearable Sensor Networks to Markerless Motion Capture for Instrumental-Based Biomechanical Risk Assessment in Lifting Activities. [PDF]
Gennarelli I +5 more
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Multi-stage decimation with hybrid CIC-polyphase filtering for IoT gateway sample rate conversion. [PDF]
Pinjerla S, Rao SS, Reddy PC.
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Key determinants of "Serious Circumstances" in awarding punitive damages for intellectual property infringement: Evidence from Chinese Judicial Judgments. [PDF]
You K.
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Harmonic-Recycling Passive RF Energy Harvester with Integrated Power Management. [PDF]
Li R, Hu Y, Li H, Jin H, Liao D.
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Compact quantum dot models for analog microwave co-simulation. [PDF]
Peri L +3 more
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