Results 1 to 10 of about 50 (49)

Comparative analysis of two gain-and offset-compensated four-phase switched-capacitor integrators based on the second-order Adams-Bashworth’s integration method [PDF]

open access: yesSerbian Journal of Electrical Engineering, 2004
Gain-and offset-compensated (GOC) modifications of four-phase inverting and no inverting switched-capacitor integrators based on the second-order Adams-Bashworth’s integration method are presented.
Radev Nikolay, Ivanov Kantcho
doaj   +2 more sources

Reduction of operational amplifiers finite gain effects in switched-capacitor biquads [PDF]

open access: yesSerbian Journal of Electrical Engineering, 2005
A combined approach for reducing the errors in the pole frequency f p, the pole Q - factor Qp and the magnitude at the pole frequency Hp, of switched capacitor biquads is presented.
Radev Nikolay, Ivanov Kantcho
doaj   +1 more source

Reduction the effects of opamp finite gain and offset voltage in LDI termination with a minus one half delay of SC ladder filters [PDF]

open access: yesSerbian Journal of Electrical Engineering, 2006
In this paper a combined approach for reducing the effects of op amp imperfections (finite gain A and offset voltage VOS) in first-order SC cell, realizing LDI (loss less discrete integrator) termination with a minus one half delay is presented.
Radev Nikolay A., Ivanov Kantcho P.
doaj   +1 more source

Compensating for Loss of Nature and Landscape in a Growing City—Berlin Case Study

open access: yesLand, 2023
By 2030, around 194,000 new dwellings will be built in Berlin, including almost 52,000 in 16 new urban districts. These and other interventions will impact the city’s nature and landscape. An important means of compensating for these losses is a land-use
Gösta F. M. Baganz, Daniela Baganz
doaj   +1 more source

Design of a 0.5 V Chopper-Stabilized Differential Difference Amplifier for Analog Signal Processing Applications

open access: yesSensors, 2023
This paper presents a low-voltage low-power chopper-stabilized differential difference amplifier (DDA) realized using 40 nm CMOS technology. Operating with a supply voltage of 0.5 V, a three-stage DDA has been employed to achieve an open-loop gain of 89 ...
Xinlan Fan, Feifan Gao, Pak Kwong Chan
doaj   +1 more source

Sequential Error Disentanglement of Three-Phase Current Sensor for AC Machine in Standstill Conditions

open access: yesIEEE Access, 2022
This article proposes a compensation method for gain and offset errors in the current sensing of three-phase AC machine drives with three current sensor measurements during exact or close to standstill conditions. Errors are treated sequentially based on
Darian Verdy Retianza   +4 more
doaj   +1 more source

A High Performance 0.3 V Standard-Cell-Based OTA Suitable for Automatic Layout Flow

open access: yesApplied Sciences, 2023
In this paper, we propose a novel standard-cell-based OTA architecture based on an improved version of the differential to single-ended converter, previously proposed by the authors, on a novel standard-cell-based basic voltage amplifier block.
Riccardo Della Sala   +2 more
doaj   +1 more source

A Fully Integrated K-Band Dual Down-Conversion Receiver for Radar Applications in 90 nm CMOS

open access: yesIEEE Access, 2020
A fully integrated K-band dual down-conversion receiver for phased array radar applications in 90 nm CMOS is presented. The receiver utilizes the dual down-conversion architecture to achieve superior performance.
An'an Li   +10 more
doaj   +1 more source

A 77-dB Dynamic-Range Analog Front-End for Fine-Dust Detection Systems with Dual-Mode Ultra-Low Noise TIA

open access: yesSensors, 2021
This paper presents an analog front-end for fine-dust detection systems with a 77-dB-wide dynamic range and a dual-mode ultra-low noise TIA with 142-dBΩ towards the maximum gain.
Reza E. Rad   +11 more
doaj   +1 more source

Fixed Pattern Noise Reduction and Linearity Improvement in Time-Mode CMOS Image Sensors

open access: yesSensors, 2020
In the paper, a digital clock stopping technique for gain and offset correction in time-mode analog-to-digital converters (ADCs) has been proposed. The technique is dedicated to imagers with massively parallel image acquisition working in the time mode ...
Miron Kłosowski, Yichuang Sun
doaj   +1 more source

Home - About - Disclaimer - Privacy