Results 1 to 10 of about 2,178,356 (388)
Programmable Quantum Gate Arrays [PDF]
Physical Review Letters, 1997 3 pages, REVTEX. Submitted to Phys.
Isaac L. Chuang, Michael A. Nielsen
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Mixed-precision weights network for field-programmable gate array. [PDF]
PLoS ONE, 2021 In this study, we introduced a mixed-precision weights network (MPWN), which is a quantization neural network that jointly utilizes three different weight spaces: binary {-1,1}, ternary {-1,0,1}, and 32-bit floating-point.
Ninnart Fuengfusin, Hakaru Tamukoh
doaj +2 more sources
<title>Optically programmable gate array</title> [PDF]
, 2000 The Optically Programmable Gate Array (OPGA), an optical version of a conventional FPGA, benefits from a direct parallel interface between an optical memory and a logic circuit.
José Mumbrú +7 more
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A Low-Power Reconfigurable Logic Array Based on Double-Gate Transistors [PDF]
, 2008 A fine-grained reconfigurable architecture based on double gate technology is proposed and analyzed. The logic function operating on the first gate of a double-gate (DG) transistor is reconfigured by altering the charge on its second gate.
Paul Beckett
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A field programmable gate array based modular motion control platform [PDF]
, 2011 The expectations from motion control systems have been rising day by day. As the systems become more complex, conventional motion control systems can not achieve to meet all the specifications with optimized results.
Osman Koç +3 more
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Parallelized Field-Programmable Gate Array Data Processing for High-Throughput Pulsed-Radar Systems [PDF]
SensorsA parallelized field-programmable gate array (FPGA) architecture is proposed to realize an ultra-fast, compact, and low-cost dual-channel ultra-wideband (UWB) pulsed-radar system.
Aaron D. Pitcher +3 more
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Applied Sciences, 2021 The degradation effect of a field-programmable gate array becomes a significant issue due to the high density of logic circuits inside the field-programmable gate array. The degradation effect occurs because of the rapid technology scaling process of the
Anuar Jaafar +4 more
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FPGA Implementation of Threshold-Type Binary Memristor and Its Application in Logic Circuit Design
Micromachines, 2021 In this paper, a memristor model based on FPGA (field programmable gate array) is proposed, by using which the circuit of AND gate and OR gate composed of memristors is built. Combined with the original NOT gate in FPGA, the NAND gate, NOR gate, XOR gate
Liu Yang +3 more
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Gate reflectometry in dense quantum dot arrays
New Journal of Physics, 2023 Silicon quantum devices are maturing from academic single- and two-qubit devices to industrially-fabricated dense quantum-dot (QD) arrays, increasing operational complexity and the need for better pulsed-gate and readout techniques.
Fabio Ansaloni +14 more
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Amorphous IGZO Thin-Film Transistor Gate Driver in Array for Ultra-Narrow Border Displays
IEEE Journal of the Electron Devices Society, 2022 A gate driver in array (GIA) design based on the amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor (TFT) is developed for narrow border displays.
Liufei Zhou +6 more
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