Results 21 to 30 of about 1,050,120 (328)

VLSI Design and FPGA Implementation of an NTT Hardware Accelerator for Homomorphic SEAL-Embedded Library

open access: yesIEEE Access, 2023
Homomorphic Encryption (HE) allows performing specific algebraic computations on encrypted data without the need for decryption. For this reason, HE is emerging as a strong privacy-preserving solution in cloud computing environments since it allows to ...
S. Matteo, Matteo Lo Gerfo, S. Saponara
semanticscholar   +1 more source

Accelerating Population Count with a Hardware Co-Processor for MicroBlaze

open access: yesJournal of Low Power Electronics and Applications, 2021
This paper proposes a Field-Programmable Gate Array (FPGA)-based hardware accelerator for assisting the embedded MicroBlaze soft-core processor in calculating population count.
Iouliia Skliarova
doaj   +1 more source

MXQuery with Hardware Acceleration [PDF]

open access: yes2012 IEEE 28th International Conference on Data Engineering, 2012
We demonstrate MXQuery/H, a modified version of MXQuery that uses hardware acceleration to speed up XML processing. The main goal of this demonstration is to give an interactive example of hardware/software co-design and show how system performance and energy efficiency can be improved by off-loading tasks to FPGA hardware.
Fischer, Peter M., Teubner, Jens
openaire   +2 more sources

Efficient Dynamic Reconfigurable CNN Accelerator for Edge Intelligence Computing on FPGA

open access: yesInformation, 2023
This paper proposes an efficient dynamic reconfigurable CNN accelerator (EDRCA) for FPGAs to tackle the issues of limited hardware resources and low energy efficiency in the deployment of convolutional neural networks on embedded edge computing devices ...
Kaisheng Shi   +4 more
doaj   +1 more source

Hardware-Accelerated Simulated Radiography [PDF]

open access: yesIEEE Visualization 2005 - (VIS'05), 2006
We present the application of hardware accelerated volume rendering algorithms to the simulation of radiographs as an aid to scientists designing experiments, validating simulation codes, and understanding experimental data. The techniques presented take advantage of 32-bit floating point texture capabilities to obtain solutions to the radiative ...
Laney, D.   +5 more
openaire   +2 more sources

Lifting Based Object Detection Networks of Remote Sensing Imagery for FPGA Accelerator

open access: yesIEEE Access, 2020
The on-board object detection of remote sensing images is of great significance and challenges in both military and civilian fields. To achieved on-board object detection, we require a high-performance and low power hardware architecture. Inspired by the
Yujin Zheng   +3 more
doaj   +1 more source

Compact Message Permutation for a Fully Pipelined BLAKE-256/512 Accelerator

open access: yesIEEE Access, 2022
Developing a low-cost and high-performance BLAKE accelerator has recently become an attractive research trend because the BLAKE algorithm is important in widespread applications, such as cryptocurrencies, data security, and digital signatures ...
Hoai Luan Pham   +3 more
doaj   +1 more source

Hardware-accelerator aware VNF-chain recovery [PDF]

open access: yes, 2020
Hardware-accelerators in Network Function Virtualization (NFV) environments have aided telecommunications companies (telcos) to reduce their expenditures by offloading compute-intensive VNFs to hardware-accelerators.
Colle, Didier   +3 more
core   +1 more source

Power Efficient Tiny Yolo CNN Using Reduced Hardware Resources Based on Booth Multiplier and WALLACE Tree Adders

open access: yesIEEE Open Journal of Circuits and Systems, 2020
Convolutional Neural Network (CNN) has attained high accuracy and it has been widely employed in image recognition tasks. In recent times, deep learning-based modern applications are evolving and it poses a challenge in research and development of ...
Fasih Ud Din Farrukh   +6 more
doaj   +1 more source

A Hardware Accelerator for Protocol Buffers

open access: yesMicro, 2021
Serialization frameworks are a fundamental component of scale-out systems, but introduce significant compute overheads. However, they are amenable to acceleration with specialized hardware.
S. Karandikar   +7 more
semanticscholar   +1 more source

Home - About - Disclaimer - Privacy