Results 41 to 50 of about 717,844 (304)

Hardware Acceleration of Neural Graphics

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023
Rendering and inverse-rendering algorithms that drive conventional computer graphics have recently been superseded by neural representations (NR). NRs have recently been used to learn the geometric and the material properties of the scenes and use the information to synthesize photorealistic imagery, thereby promising a replacement for traditional ...
Muhammad Husnain Mubarik, Ramakrishna Kanungo, Tobias Zirr, Rakesh Kumar 0002   +3 more
openaire   +3 more sources

Hardware Accelerator of Matrix Multiplication on FPGAs : Hardware Accelerator of Matrix Multiplication on FPGAs

, 2018
To solve the computational complexity and time-consuming problem of large matrix multiplication, this thesis design a hardware accelerator using parallel computation structure based on FPGA.
Chen, Zhe
core   +2 more sources

Hardware Accelerated Power Estimation [PDF]

Design, Automation and Test in Europe, 2005
In this paper, we present power emulation, a novel design paradigm that utilizes hardware acceleration for the purpose of fast power estimation. Power emulation is based on the observation that the functions necessary for power estimation (power model evaluation, aggregation, etc.) can be implemented as hardware circuits.
Joel Coburn, Srivaths Ravi 0001, Anand Raghunathan   +2 more
openaire   +3 more sources

FPGA-based conformance testing and system prototyping of an MPEG-4 SA-DCT hardware accelerator [PDF]

, 2005
Two FPGA implementations of a shape adaptive discrete cosine transform (SA-DCT) accelerator are presented in this paper: one PCI-based and the other AMBA-based. The former is used for conformance testing with the MPEG-4 standard requirements.
O'Connor, Noel E., Casey, Alan, O\u27Connor, Noel E., Muresan, Valentin, Kinane, Andrew, A. Casey, N. O'Connor, V. Muresan, A. Kinane   +8 more
core   +2 more sources

Artificial Intelligence in Systemic Sclerosis: Clinical Applications, Challenges, and Future Directions

Arthritis Care &Research, EarlyView.
Systemic sclerosis (SSc) is a rare autoimmune disease defined by immune dysregulation, vasculopathy, and progressive fibrosis of the skin and internal organs. Despite advances in care, major complications such as interstitial lung disease (ILD) and myocardial involvement remain the leading causes of morbidity and mortality.
Cristiana Sieiro Santos, José Miguel Sequí‐Sabater, Diego Benavent   +2 more
wiley   +1 more source

Design of exact reduct rough set hardware accelerator for early-stage diabetes risk prediction

Results in Control and Optimization
Diabetes is a prevalent, chronic metabolic disorder worldwide. Detecting and predicting risks early are vital for timely intervention. In this paper, the design and implementation of an Exact Reduct Rough Set Hardware Accelerator is presented for early ...
Kanchan S. Tiwari, Uma D. Dattasamje, Rekha S. Kadam, Manisha A. Dudhedia, Aishwarya A. Andhale, Jayshree R. Pansare, Bapurao G. Marlapalle   +6 more
doaj   +1 more source

Audio Denoising Coprocessor Based on RISC-V Custom Instruction Set Extension

Acoustics, 2022
As a typical active noise control algorithm, Filtered-x Least Mean Square (FxLMS) is widely used in the field of audio denoising. In this study, an audio denoising coprocessor based on Retrenched Injunction System Computer-V (RISC-V), a custom ...
Jun Yuan, Qiang Zhao, Wei Wang, Xiangsheng Meng, Jun Li, Qin Li   +5 more
doaj   +1 more source

Observer‐Based Adaptive Event‐Triggered Tracking Control for Fuzzy TS Systems With Premise Mismatch

International Journal of Adaptive Control and Signal Processing, EarlyView.
This paper presents an adaptive logistic event‐triggered observer‐based tracking controller for Takagi‐Sugeno fuzzy systems under constrained inputs and network delays. Leveraging a hybrid LMI and Secretary Bird Optimization approach, this strategy significantly minimizes communication overhead and computational burden while ensuring optimal reference ...
Oussama Djadane, Salama Makni, Mourad Kchaou, Ahmed El Hajjaji   +3 more
wiley   +1 more source

An Impulse-C Hardware Accelerator for Packet Classification Based on Fine/Coarse Grain Optimization

International Journal of Reconfigurable Computing, 2013
Current software-based packet classification algorithms exhibit relatively poor performance, prompting many researchers to concentrate on novel frameworks and architectures that employ both hardware and software components. The Packet Classification with
O. Ahmed, S. Areibi, R. Collier, G. Grewal   +3 more
doaj   +1 more source

SOM Hardware-Accelerator [PDF]

, 1997
Rüping S, Porrmann M, Rückert U. SOM Hardware-Accelerator. In: Workshop on Self-Organizing Maps (WSOM). Espoo, Finnland; 1997: 136-141.Many applications of Selforganizing Feature Maps (SOMs) need a high performance hardware system in order to be ...
Porrmann, Mario ; https://orcid.org/, Rückert, Ulrich, Rüping, Stefan   +2 more
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