Results 11 to 20 of about 46,646 (266)
Hardware-accelerator aware VNF-chain recovery [PDF]
, 2020 Hardware-accelerators in Network Function Virtualization (NFV) environments have aided telecommunications companies (telcos) to reduce their expenditures by offloading compute-intensive VNFs to hardware-accelerators.
Colle, Didier +3 more
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Hardware-accelerated dynamic binary translation [PDF]
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, 2017 Dynamic Binary Translation (DBT) is often used in hardware/software co-design to take advantage of an architecture model while using binaries from another one. The co-development of the DBT engine and of the execution architecture leads to architecture with special support to these mechanisms.
Rokicki, Simon +2 more
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Sensors, 2023 Though custom deep learning (DL) hardware accelerators are attractive for making inferences in edge computing devices, their design and implementation remain a challenge. Open-source frameworks exist for exploring DL hardware accelerators.
Dennis Agyemanh Nana Gookyi +4 more
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The GPU vs Phi Debate: Risk Analytics Using Many-Core Computing [PDF]
, 2015 The risk of reinsurance portfolios covering globally occurring natural catastrophes, such as earthquakes and hurricanes, is quantified by employing simulations.
Varghese, Blesson
core +3 more sources
Convolutional Neural Networks using FPGA-based Pipelining
Iraqi Journal for Computer Science and Mathematics, 2023 In order to speed up convolutional neural networks (CNNs), this study gives a complete overview of the use of FPGA-based pipelining for hardware acceleration of CNNs.
Gheni A. Ali, ahmed hussein ali
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Resistive Neural Hardware Accelerators
Proceedings of the IEEE, 2023 Deep Neural Networks (DNNs), as a subset of Machine Learning (ML) techniques, entail that real-world data can be learned and that decisions can be made in real-time. However, their wide adoption is hindered by a number of software and hardware limitations. The existing general-purpose hardware platforms used to accelerate DNNs are facing new challenges
Kamilya Smagulova +4 more
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Implementation of the SoftMax Activation for Reconfigurable Neural Network Hardware Accelerators
Applied Sciences, 2023 In recent decades, machine-learning algorithms have been extensively utilized to tackle various complex tasks. To achieve the high performance and efficiency of these algorithms, various hardware accelerators are used.
Vladislav Shatravin +2 more
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MODEL OF AUTOMATED SYNTHESIS TOOL FOR HARDWARE ACCELERATORS OF CONVOLUTIONAL NEURAL NETWORKS FOR PROGRAMMABLE LOGIC DEVICES [PDF]
Научно-технический вестник информационных технологий, механики и оптики, 2020 Currently, more and more tasks on image processing and analysis are being solved using convolutional neural networks. Neural networks implemented using high-level programming languages, libraries and frameworks cannot be used in real-time systems, for ...
Victor A. Egiazarian +1 more
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The use of field-programmable gate arrays for the hardware acceleration of design automation tasks [PDF]
, 1996 This paper investigates the possibility of using Field-Programmable Gate Arrays (Fr’GAS) as reconfigurable co-processors for workstations to produce moderate speedups for most tasks in the design process, resulting in a worthwhile overall design ...
Allinson, Nigel M. +2 more
core +2 more sources
Hardware Accelerators for Real-Time Face Recognition: A Survey
IEEE Access, 2022 Real-time face recognition has been of great interest in the last decade due to its wide and varied critical applications which include biometrics, security in public places, and identification in login systems.
Asma Baobaid +3 more
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