Results 21 to 30 of about 3,717 (263)
Quick Boot of Trusted Execution Environment With Hardware Accelerators
IEEE Access, 2020 The Trusted Execution Environment (TEE) offers a software platform for secure applications. The TEE offers a memory isolation scheme and software authentication from a high privilege mode.
Trong-Thuc Hoang +6 more
doaj +1 more source
Special Section on Edge AI and Accelerators
IEEE Open Journal of Circuits and Systems, 2021 This special section presents seven state-of-the-art design techniques for AI hardware accelerators that lead to substantial improvements on energy efficiency, reconfigurability, and resource utilization.
Deepu John, Yongfu Li, Xinmiao Zhang
doaj +1 more source
Adaptive embedded technologies: hardware acceleration [PDF]
, 2021 This thesis establishes the benefits of multi-architecture systems by using reconfigurable modules in conjunction with a case integration strategy to improve system performance. The modules and strategies discussed in this thesis provide opportunities to the improve system performance of processing units designed for the consumer market.
openaire +1 more source
Implementation of the Lattice Boltzmann Method on Heterogeneous Hardware and Platforms using OpenCL
Advances in Electrical and Computer Engineering, 2012 The Lattice Boltzmann method (LBM) has become an alternative method for computational fluid dynamics with a wide range of applications. Besides its numerical stability and accuracy, one of the major advantages of LBM is its relatively easy ...
TEKIC, P. M. +2 more
doaj +1 more source
Design Exploration of AES Accelerators on FPGAs and GPUs
Journal of Telecommunications and Information Technology, 2017 The embedded systems are increasingly becoming a key technological component of all kinds of complex technical systems and an exhaustive analysis of the state of the art of all current performance with respect to architectures, design methodologies ...
Vincenzo Conti, Salvatore Vitabile
doaj +1 more source
Hardware Accelerators for Elliptic Curve Cryptography [PDF]
Advances in Radio Science, 2008 In this paper we explore different hardware accelerators for cryptography based on elliptic curves. Furthermore, we present a hierarchical multiprocessor system-on-chip (MPSoC) platform that can be used for fast integration and evaluation of novel ...
C. Puttmann +3 more
doaj
A Real-Time Naive Bayes Classifier Accelerator on FPGA
IEEE Access, 2020 In this paper, we propose a real-time hardware naive Bayes classifier (NBC) which is implemented on field programmable gate array (FPGA). We first use logarithm transformation based look-up table and float-to-fixed point process to simplify the ...
Zhen Xue, Jizeng Wei, Wei Guo
doaj +1 more source
A survey of field programmable gate array (FPGA)-based graph convolutional neural network accelerators: challenges and opportunities [PDF]
PeerJ Computer Science, 2022 Graph convolutional networks (GCNs) based on convolutional operations have been developed recently to extract high-level representations from graph data.
Shun Li +4 more
doaj +2 more sources
, 2023 AbstractWith Moore’s law and Dennard’s scaling no longer fueling the improvement in computing performance, new avenues for increasing performance are needed. Hardware acceleration is one avenue where many researchers and industrial parties are working and investing.
openaire +1 more source
A Novel Two-Level Protection Scheme against Hardware Trojans on a Reconfigurable CNN Accelerator
CryptographyWith the boom in artificial intelligence (AI), numerous reconfigurable convolution neural network (CNN) accelerators have emerged within both industry and academia, aiming to enhance AI computing capabilities.
Zichu Liu +3 more
doaj +1 more source