Results 41 to 50 of about 46,646 (266)
Accelerating Fully Homomorphic Encryption in Hardware
We present a custom architecture for realizing the Gentry-Halevi fully homomorphic encryption (FHE) scheme. This contribution presents the first full realization of FHE in hardware. The architecture features an optimized multi-million bit multiplier based on the Schonhage Strassen multiplication algorithm.
Doroez, Yarkin +2 more
openaire +3 more sources
Accelerator Memory Reuse in the Dark Silicon Era [PDF]
Accelerators integrated on-die with General-Purpose CPUs (GP-CPUs) can yield significant performance and power improvements. Their extensive use, however, is ultimately limited by their area overhead; due to their high degree of specialization, the ...
Carloni, L.P. +4 more
core +1 more source
Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification
Modern Systems-on-Chip (SoC) designs are increasingly heterogeneous and contain specialized semi-programmable accelerators in addition to programmable processors.
Gupta, Aarti +5 more
core +1 more source
On-Chip Reconfigurable Hardware Accelerators for Popcount Computations
Popcount computations are widely used in such areas as combinatorial search, data processing, statistical analysis, and bio- and chemical informatics.
Valery Sklyarov +2 more
doaj +1 more source
Hardware Accelerated Power Estimation [PDF]
In this paper, we present power emulation, a novel design paradigm that utilizes hardware acceleration for the purpose of fast power estimation. Power emulation is based on the observation that the functions necessary for power estimation (power model evaluation, aggregation, etc.) can be implemented as hardware circuits.
Coburn, Joel +2 more
openaire +3 more sources
Transformers networks have been a great milestone in the natural language processing field, and have powered technologies like ChatGPT, which are undeniably changing people’s lives.
Alejandro Araya-Núñez +5 more
doaj +1 more source
The AXIOM software layers [PDF]
AXIOM project aims at developing a heterogeneous computing board (SMP-FPGA).The Software Layers developed at the AXIOM project are explained.OmpSs provides an easy way to execute heterogeneous codes in multiple cores.
Ayguadé Parra, Eduard +24 more
core +3 more sources
A Component-Centric Perspective on Hardware Accelerators for LLMs
The rapid scaling of large language models (LLMs), especially those based on the Transformer architecture, has intensified the demand for high-performance hardware accelerators capable of supporting massive parameter counts with minimal latency and ...
Jia Ke +6 more
doaj +1 more source
The CBE Hardware Accelerator for Numerical Relativity: A Simple Approach
Hardware accelerators (such as the Cell Broadband Engine) have recently received a significant amount of attention from the computational science community because they can provide significant gains in the overall performance of many numerical ...
Khanna, Gaurav
core +1 more source
Rethinking plastic waste: innovations in enzymatic breakdown of oil‐based polyesters and bioplastics
Plastic pollution remains a critical environmental challenge, and current mechanical and chemical recycling methods are insufficient to achieve a fully circular economy. This review highlights recent breakthroughs in the enzymatic depolymerization of both oil‐derived polyesters and bioplastics, including high‐throughput protein engineering, de novo ...
Elena Rosini +2 more
wiley +1 more source

