Results 71 to 80 of about 2,650,279 (206)
A Low-Power Hardware Architecture for Real-Time CNN Computing. [PDF]
Liu X, Cao C, Duan S.
europepmc +1 more source
SOM Hardware-Accelerator [PDF]
Rüping S, Porrmann M, Rückert U. SOM Hardware-Accelerator. In: Workshop on Self-Organizing Maps (WSOM). Espoo, Finnland; 1997: 136-141.Many applications of Selforganizing Feature Maps (SOMs) need a high performance hardware system in order to be ...
Porrmann, Mario ; https://orcid.org/ +2 more
core
Hardware architecture of an (5 × 5) filter.
Hardware architecture of an (5 × 5) filter.
Nassar Ikram (3342515) +3 more
core +1 more source
Carrier frequency offset (CFO), which is often caused by the mismatch between the local oscillators in transmitter and receiver, limits the performance of multiple-input multiple-output (MIMO) wireless communication systems. This paper presents a maximum-
Mingda Zhou +3 more
doaj +1 more source
Communications and High-Precision Positioning (CHP2): Hardware Architecture, Implementation, and Validation. [PDF]
Yu H +10 more
europepmc +1 more source
Efficient FPGA Implementation of Automatic Nuclei Detection in Histopathology Images
Accurate and efficient detection of cell nuclei is an important step towards the development of a pathology-based Computer Aided Diagnosis. Generally, high-resolution histopathology images are very large, in the order of billion pixels, therefore nuclei ...
Haonan Zhou +2 more
doaj +1 more source
SCA: Search-Based Computing Hardware Architecture with Precision Scalable and Computation Reconfigurable Scheme. [PDF]
Chang L, Zhao X, Zhou J.
europepmc +1 more source
A Dynamic Fitness Function Applied to Improve the Generalisation when Evolving a Signal
Evolvable Hardware (EHW) has been proposed as a new method for designing electronic circuits. In this paper it is applied for evolving a prosthetic hand controller. The novel controller architecture is based on digital logic gates.
Processing Hardware Architecture +1 more
core
A Low-Cost Hardware Architecture for EV Battery Cell Characterization Using an IoT-Based Platform. [PDF]
Martínez-Sánchez R +4 more
europepmc +1 more source
Hybrid Pipeline Hardware Architecture Based on Error Detection and Correction for AES. [PDF]
Algredo-Badillo I +5 more
europepmc +1 more source

