Results 41 to 50 of about 495,121 (361)
Fast Hardware implementation of an Hadamard Transform Using RVC-CAL Dataflow Programming [PDF]
International audienceImplementing an algorithm to hardware platforms is generally not an easy task. The algorithm, typically described in a high-level specification language, must be translated to a low-level HDL language.
Abid, Mohamed+5 more
core +3 more sources
This paper proposes a modified predictive direct torque control (PDTC) application-specific integrated circuit (ASIC) of a motor drive with a fuzzy controller for eliminating sampling and calculating delay times in hysteresis controllers.
Guo-Ming Sung+3 more
doaj +1 more source
An Efficient and Cost Effective FPGA Based Implementation of the Viola-Jones Face Detection Algorithm [PDF]
We present an field programmable gate arrays (FPGA) based implementation of the popular Viola-Jones face detection algorithm, which is an essential building block in many applications such as video surveillance and tracking.
Ababei, Cristinel+4 more
core +4 more sources
Summary Data‐driven forecasting of ship motions in waves is investigated through feedforward and recurrent neural networks as well as dynamic mode decomposition. The goal is to predict future ship motion variables based on past data collected on the field, using equation‐free approaches.
Matteo Diez+2 more
wiley +1 more source
Hardware Implementation of LMS-Based Adaptive Noise Cancellation Core with Low Resource Utilization [PDF]
A hardware implementation of adaptive noise cancellation (ANC) core is proposed. Adaptive filters are widely used in different applications such as adaptive noise cancellation, prediction, equalization, inverse modeling and system identification.
Omid Sharifi Tehrani+2 more
doaj
From UML Specification into FPGA Implementation
In the paper a method of using the Unified Modeling Language for specification of digital systems, especially logic controllers, is presented. The proposed method is based mainly on the UML state machine diagrams and uses Hierarchical Concurrent Finite ...
Grzegorz Bazydlo+3 more
doaj +1 more source
Representation and matching of knowledge to design digital systems [PDF]
A knowledge-based expert system is described that provides an approach to solve a problem requiring an expert with considerable domain expertise and facts about available digital hardware building blocks.
Jones, J. U., Shiva, S. G.
core +1 more source
Self‐organized Criticality in Neuromorphic Nanowire Networks With Tunable and Local Dynamics
Memristive nanowire networks (NWNs) are shown to be electrically tunable to a critical state where specific local dynamics evaluated by multiterminal characterization are exploited as feature selection in nonlinear transformation (NLT) tasks.
Fabio Michieletti+3 more
wiley +1 more source
The Challenges of Hardware Synthesis from C-like Languages [PDF]
The relentless increase in the complexity of integrated circuits we can fabricate imposes a continuing need for ways to describe complex hardware succinctly.
Edwards, Stephen A.
core +2 more sources
The Hardware Description Language DACAPO III [PDF]
The broadband HDL DACAPO III is introduced by discussing language support for various levels of abstraction: Gate/Switch level, RT level, Algorithmic level, System level. A short comparison with the VHDL approach to model hardware by concurrently active sequential processes concludes this contribution.
openaire +3 more sources