Results 241 to 250 of about 173,402 (304)

HAPQ: A Hardware-Aware Pruning and Quantization Pipeline for Event-Based SNN Detection. [PDF]

Sensors (Basel)
Li Z, Wu J.
europepmc   +1 more source

Sustainable Synaptic Device with Two‐Dimensional Ferroelectric Materials for Neuromorphic Computing

Advanced Science, EarlyView.
α‐In2Se3 based FeSFETs can be utilized as sustainable devices through polarization switching governed by both out‐of‐plane and in‐plane polarizations. Upon reaching a fatigued state, current annealing enabled by conductance modulation can significantly enhance the endurance of FeSFETs.
Jaewook Yoo, Seokjin Oh, Minah Park, Jong Min Song, Hongseung Lee, Seohyeon Park, Sojin Jung, Seongbin Lim, Soohyun Lim, Dongsun Shin, Ji Won Heo, TaeWan Kim, Hagyoul Bae   +12 more
wiley   +1 more source

SpChipADF: An Architecture Design Framework for Radar Signal Processing Hardware Accelerators. [PDF]

Micromachines (Basel)
Wang H, Yang S, Chen Z, Sun H, Shen Y, Li H, Jiang Z, Li Y, Liang X.   +8 more
europepmc   +1 more source

Real-Time Cardiac Arrhythmia Classification Using TinyML on Ultra-Low-Cost Microcontrollers: A Feasibility Study for Resource-Constrained Environments. [PDF]

Bioengineering (Basel)
Zambrano-de la Torre M, Guzman-Alfaro S, Acuña-Correa A, Soto-Murillo MA, Guzmán-Fernández M, Robles-Ortiz R, Villagrana-Bañuelos KE, Arceo-Olague JG, Espino-Salinas CH, Sánchez-Reyna AG, Cuevas-Rodriguez EO.   +10 more
europepmc   +1 more source

IFA-ICP: A Low-Complexity and Image Feature-Assisted Iterative Closest Point (ICP) Scheme for Odometry Estimation in SLAM, and Its FPGA-Based Hardware Accelerator Design. [PDF]

Sensors (Basel)
Li JE, Hwang YT.
europepmc   +1 more source

Hardware Implementation of A Power Efficient Huffman Decoding

, 2014
Pi-Chung Wang, Chun-Liang Lee, Rong-Chang Chen, Hung-Yi Chang   +3 more
core  

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Hardware implementation of bluetooth security

IEEE Pervasive Computing, 2003
Bluetooth can implement its security layer's key-generation mechanism and authentication in software or hardware. Software implementation usually satisfies user requirements, but in time-critical applications or processing-constrained devices, a hardware implementation is preferable.
Paris Kitsos, Nicolas Sklavos, O Koufopavlou   +2 more
exaly   +2 more sources

Hardware implementation

ACM SIGGRAPH 2008 classes, 2007
In the classical Irradiance Caching algorithm, rays are first traced from the viewpoint towards the scene. For each corresponding intersection point, the irradiance cache is queried to determine whether a new irradiance record has to be created. When a new record is required, the irradiance value is computed using distribution ray tracing.
Brian Bailey, Grant Martin, Andrew Piziali   +2 more
openaire   +2 more sources

Hardware implementation of habituation

Proceedings of ISCAS'95 - International Symposium on Circuits and Systems, 2002
Habituation is a biological behavior allowing non-critical information to be disregarded enabling more processing resources for critical tasks. We have implemented habituation adaptation in VLSI. Our simulations and experimental results illustrate the habituation response.
Tony Wang, Lex A. Akers
openaire   +1 more source

Hardware implementation of the neural gas

Proceedings of International Conference on Neural Networks (ICNN'97), 2002
The paper presents a hardware implementation of the neural gas (NGAS) algorithm. The NGAS is based on vector quantization and is applied to very low bit-rate video compression. The algorithm exhibits interesting properties that can be exploited in an HW realization. The modular structure provides inherent parallelism and can therefore be regarded as an
Ancona F, ROVETTA, STEFANO, ZUNINO, RODOLFO   +2 more
openaire   +2 more sources