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IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2023
Accurate programming of non-volatile memory (NVM) devices in analog in-memory computing (AIMC) cores is critical to achieve high matrix-vector multiplication (MVM) accuracy during deep learning inference workloads.
J. Büchel +9 more
semanticscholar +1 more source
Accurate programming of non-volatile memory (NVM) devices in analog in-memory computing (AIMC) cores is critical to achieve high matrix-vector multiplication (MVM) accuracy during deep learning inference workloads.
J. Büchel +9 more
semanticscholar +1 more source
Parallel computation in memory-making
Science, 2017Memory Processing The hippocampus plays a central role in the encoding, consolidation, and recall of memories. Consolidation and recall are thought to be executed by the replay of previously acquired memory traces by hippocampal cell assemblies.
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Approximate Memristive In-memory Computing
ACM Transactions on Embedded Computing Systems, 2017The bottleneck between the processing elements and memory is the biggest issue contributing to the scalability problem in computing. In-memory computation is an alternative approach that combines memory and processor in the same location, and eliminates the potential memory bottlenecks.
Hasan Erdem Yantir +2 more
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In-Memory Computing: Advances and prospects
IEEE Solid-State Circuits Magazine, 2019High-dimensionality matrix-vector multiplication (MVM) is a dominant kernel in signal-processing and machine-learning computations that are being deployed in a range of energy- and throughput-constrained applications.
N. Verma +7 more
semanticscholar +1 more source
Design, Automation and Test in Europe, 2023
As deep neural networks (DNNs) have been success-fully developed in many applications with continuously increasing complexity, the number of weights in DNNs surges, leading to consistent demands for denser memories than SRAMs.
Wangxin He +5 more
semanticscholar +1 more source
As deep neural networks (DNNs) have been success-fully developed in many applications with continuously increasing complexity, the number of weights in DNNs surges, leading to consistent demands for denser memories than SRAMs.
Wangxin He +5 more
semanticscholar +1 more source
IEEE Transactions on Computers, 1970
If, as presently projected, the cost of microelectronic arrays in the future will tend to reflect the number of pins on the array rather than the number of gates, the logic-in-memory array is an extremely attractive computer component. Such an array is essentially a microelectronic memory with some combinational logic associated with each storage ...
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If, as presently projected, the cost of microelectronic arrays in the future will tend to reflect the number of pins on the array rather than the number of gates, the logic-in-memory array is an extremely attractive computer component. Such an array is essentially a microelectronic memory with some combinational logic associated with each storage ...
openaire +1 more source
Benchmarking DNN Mapping Methods for the in-Memory Computing Accelerators
IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2023This paper presents a study of methods for mapping the convolutional workloads in deep neural networks (DNNs) onto the computing hardware in the in-memory computing (IMC) architecture.
Yimin Wang, Xuanyao Fong
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PIC-RAM: Process-Invariant Capacitive Multiplier Based Analog In Memory Computing in 6T SRAM
Design, Automation and Test in Europe, 2023In-Memory Computing (IMC) is a promising approach to enabling energy-efficient Deep Neural Network-based applications on edge devices. However, analog domain dot product and multiplication suffers accuracy loss due to process variations.
K.L.N. Prasad +3 more
semanticscholar +1 more source
Computing in memory with FeFETs
Proceedings of the International Symposium on Low Power Electronics and Design, 2018Data transfer between a processor and memory frequently represents a bottleneck with respect to improving application-level performance. Computing in memory (CiM), where logic and arithmetic operations are performed in memory, could significantly reduce both energy consumption and computational overheads associated with data transfer.
Dayane Reis +2 more
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Self-Selective Multi-Terminal Memtransistor Crossbar Array for In-Memory Computing.
ACS Nano, 2021Two-terminal resistive switching devices are commonly plagued with longstanding scientific issues including interdevice variability and sneak current that lead to computational errors and high-power consumption.
Xuewei Feng +9 more
semanticscholar +1 more source