Results 11 to 20 of about 9,050,905 (317)
SISA: Set-Centric Instruction Set Architecture for Graph Mining on Processing-in-Memory Systems [PDF]
Simple graph algorithms such as PageRank have been the target of numerous hardware accelerators. Yet, there also exist much more complex graph mining algorithms for problems such as clustering or maximal clique listing.
Maciej Besta +16 more
semanticscholar +1 more source
NetQASM—a low-level instruction set architecture for hybrid quantum–classical programs in a quantum internet [PDF]
We introduce NetQASM, a low-level instruction set architecture for quantum internet applications. NetQASM is a universal, platform-independent and extendable instruction set with support for local quantum gates, powerful classical logic and quantum ...
A. Dahlberg +6 more
semanticscholar +1 more source
Quantum Instruction Set Design for Performance. [PDF]
A quantum instruction set is where quantum hardware and software meet. We develop characterization and compilation techniques for non-Clifford gates to accurately evaluate its designs.
Cupjin Huang +12 more
semanticscholar +1 more source
In-memory computing (IMC) aims to solve the performance gap between CPU and memories introduced by the memory wall. However, it does not address the energy wall problem caused by data transfer over memory hierarchies.
Kévin Mambu +3 more
doaj +1 more source
Instruction-Set Accelerated Implementation of CRYSTALS-Kyber
Large scale quantum computers will break classical public-key cryptography protocols by quantum algorithms such as Shor’s algorithm. Hence, designing quantum-safe cryptosystems to replace current classical algorithms is crucial.
Mojtaba Bisheh-Niasar +2 more
semanticscholar +1 more source
Optimization of beam pointing algorithm based on PowerPC
Based on PowerPC architecture, this paper proposes an optimization strategy of beam pointing algorithm, which is realized from the trigonometric function calculation optimization, floating point arithmetic optimization, loop nesting optimization, and ...
Lei Shulan, Wu Huixiang, Li Wenxue
doaj +1 more source
A Multi-One Instruction Set Computer for Microcontroller Applications
This work presents a simple integer-only instruction set architecture and microarchitecture derived from One Instruction Set Computers (OISCs) and embedding multiple execution modes ( ${m}$ OISC), capable of running at a reasonable performance level to ...
Marco Crepaldi +2 more
doaj +1 more source
PISA-DMA: Processing-in-Memory Instruction Set Architecture Using DMA
Processing-in-memory (PIM) has attracted attention to overcome the memory bandwidth limitation, especially for computing memory-intensive DNN applications.
Won Jun Lee +3 more
doaj +1 more source
Software/Hardware Co-Verification for Custom Instruction Set Processors
Verification of software and processor hardware usually proceeds separately, software analysis relying on the correctness of processors executing machine instructions.
Marie-Christine Jakobs +4 more
doaj +1 more source
How Far Can Camels Go? Exploring the State of Instruction Tuning on Open Resources [PDF]
In this work we explore recent advances in instruction-tuning language models on a range of open instruction-following datasets. Despite recent claims that open models can be on par with state-of-the-art proprietary models, these claims are often ...
Yizhong Wang +10 more
semanticscholar +1 more source

