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Analysis on the Possibility of RISC-V Adoption [PDF]
As the interface between hardware and software, Instruction Set Architectures (ISAs) play a key role in the operation of computers. While both hardware and software have continued to evolve rapidly over time, ISAs have undergone minimal change. Since its
Scott, Ian
core
Function-call Instruction Characteristic Analysis Based Instruction Set Architecture Recognization Method for Firmwares [PDF]
The recognition of instruction set architecture is a crucial task for conducting security research on embedded devices,and has significant implications.However,existing studies and tools often suffer from low recognition accuracy and high false positive ...
JIA Fan, YIN Xiaokang, GAI Xianzhe, CAI Ruijie, LIU Shengli
doaj +1 more source
Characteristics of simulations for instructional settings [PDF]
This paper discusses the internal characteristics of simulations. The major part of it is concerned with models and their relation with the domain. Some central concepts regarding modelling and simulation are defined. These include concepts regarding:- the structure and characteristics of the model;- the relationship to the system that is being ...
Ton de Jong, Wouter R. van Joolingen
openaire +2 more sources
Software-Based Self-Test of Set-Associative Cache Memories [PDF]
Embedded microprocessor cache memories suffer from limited observability and controllability creating problems during in-system tests. This paper presents a procedure to transform traditional march tests into software-based self-test programs for set ...
Di Carlo, Stefano+2 more
core +1 more source
Machine Assisted Proof of ARMv7 Instruction Level Isolation Properties [PDF]
In this paper, we formally verify security properties of the ARMv7 Instruction Set Architecture (ISA) for user mode executions. To obtain guarantees that arbitrary (and unknown) user processes are able to run isolated from privileged software and other ...
A. Fox+6 more
core +2 more sources
In academic libraries, library instruction often takes the form of one-shot instruction and is not always deeply linked to the broader curricula. This article will argue that if library instruction in an academic setting is to be perceived as beneficial
Roberto Arteaga
doaj +1 more source
Instruction Set Extension of a RiscV Based SoC for Driver Drowsiness Detection
This paper describes the design and implementation of a driver drowsiness detection (DDD) system using a modified RiscV processor on a field-programmable gate array (FPGA).
Seyed Kian Mousavikia+3 more
doaj +1 more source
On-Line Instruction-checking in Pipelined Microprocessors [PDF]
Microprocessors performances have increased by more than five orders of magnitude in the last three decades. As technology scales down, these components become inherently unreliable posing major design and test challenges.
Di Carlo, Stefano+2 more
core +2 more sources
Formal verification of a software countermeasure against instruction skip attacks [PDF]
Fault attacks against embedded circuits enabled to define many new attack paths against secure circuits. Every attack path relies on a specific fault model which defines the type of faults that the attacker can perform.
Encrenaz, Emmanuelle+3 more
core +6 more sources
Optimizing the SICStus Prolog virtual machine instruction set [PDF]
The Swedish Institute of Computer Science (SICS) is the vendor of SICStus Prolog. To decrease execution time and reduce space requirements, variants of SICStus Prolog's virtual instruction set were investigated.
Nässén, Henrik
core +2 more sources