Results 41 to 50 of about 1,515,607 (318)

Instruction Set Extension of a RiscV Based SoC for Driver Drowsiness Detection

IEEE Access, 2022
This paper describes the design and implementation of a driver drowsiness detection (DDD) system using a modified RiscV processor on a field-programmable gate array (FPGA).
Seyed Kian Mousavikia, Erfan Gholizadehazari, Morteza Mousazadeh, Siddika Berna Ors Yalcin   +3 more
doaj   +1 more source

Performance Debugging and Tuning using an Instruction-Set Simulator [PDF]

, 1997
Instruction-set simulators allow programmers a detailed level of insight into, and control over, the execution of a program, including parallel programs and operating systems.
Magnusson, Peter S., Montelius, Johan
core   +3 more sources

Formal verification of a software countermeasure against instruction skip attacks [PDF]

, 2013
Fault attacks against embedded circuits enabled to define many new attack paths against secure circuits. Every attack path relies on a specific fault model which defines the type of faults that the attacker can perform.
Encrenaz, Emmanuelle, Heydemann, Karine, Moro, Nicolas, Robisson, Bruno   +3 more
core   +7 more sources

Lifestyle Behaviors and Cardiotoxic Treatment Risks in Adult Childhood Cancer Survivors

Pediatric Blood &Cancer, EarlyView.
ABSTRACT Background Higher doses of anthracyclines and heart‐relevant radiotherapy increase cardiovascular disease (CVD) risk. This study assessed CVD and CVD risk factors among adult childhood cancer survivors (CCSs) across cardiotoxic treatment risk groups and examined associations between lifestyle behaviors and treatment risks.
Ruijie Li, Raquel Revuelta Iniesta, Alan R. Barker, Dimitris Vlachopoulos, Tomáš Sláma, Christina Schindera, Fabiën N. Belle   +6 more
wiley   +1 more source

A High-Performance Parallel FDTD Method Enhanced by Using SSE Instruction Set

International Journal of Antennas and Propagation, 2012
We introduce a hardware acceleration technique for the parallel finite difference time domain (FDTD) method using the SSE (streaming (single instruction multiple data) SIMD extensions) instruction set.
Dau-Chyrh Chang, Lihong Zhang, Xiaoling Yang, Shao-Hsiang Yen, Wenhua Yu   +4 more
doaj   +1 more source

Comprehensive Review of Research on Dynamic Binary Translation Techniques [PDF]

Jisuanji kexue yu tansuo
Solving compatibility issues in programs is crucial for building a domestic software ecosystem. With the diversification of computer architectures, ensuring software runs smoothly across different platforms and hardware environments has become an urgent ...
ZHANG Jin, SHAN Zehu, LIU Xiaodong, WANG Wenzhu, YU Jie, PENG Long, XIE Qiyou
doaj   +1 more source

Parent‐to‐Child Information Disclosure in Pediatric Oncology

Pediatric Blood &Cancer, EarlyView.
ABSTRACT Background Despite professional consensus regarding the importance of open communication with pediatric cancer patients about their disease, actual practice patterns of disclosure are understudied. Extant literature suggests a significant proportion of children are not told about their diagnosis/prognosis, which is purported to negatively ...
Rachel A. Kentor, Flora Hoodin, Michelle Byrd, Kristin A. Kullgren, Leah LaLonde, Lauren Benkoske, Patrick Smith, Dawn Carson, Karen MacDonald, Susumu Inoue, Brenda Kitchen, Kate Gowans, Gregory A. Yanik   +12 more
wiley   +1 more source

Neural Network Acceleration Architecture Based on RISC-V Instruction Set Extension [PDF]

Jisuanji kexue
To address the current shortcomings of RISC-V-based neural network accelerators in accelerating matrix computations and nonlinear operations within Transformer-based models,a neural network acceleration architecture based on RISC-V instruction set ...
CAI Chenghuan, WANG Yipin, XU Jiabin, ZHANG Fengzhe, ZHOU Xuegong, CAO Wei, ZHANG Fan, YU Xinsheng
doaj   +1 more source

Compiling Optimization Method of Address Immediate Value Based on C-SKY CPU [PDF]

Jisuanji gongcheng, 2016
As Reduced Instruction Set Computer(RISC) architecture processors generally use fixed-length instructions,they have to perform the function of long jump instruction in Complex Instruction Set Computer(CISC) architecture processors by a literal pool.This ...
LIAN Yulong,SHI Zheng,LI Chunqiang,WANG Huibin,SHANG Yunhai
doaj   +1 more source

Visions of the Possible

Canadian Journal of Academic Librarianship, 2023
In academic libraries, library instruction often takes the form of one-shot instruction and is not always deeply linked to the broader curricula. This article will argue that if library instruction in an academic setting is to be perceived as beneficial
Roberto Arteaga
doaj   +1 more source