Results 1 to 10 of about 519,671 (307)
Modeling the Effects of Threading Dislocations on Current in AlGaN/GaN HEMT
The aim of this paper is to model the effects of threading dislocations on both gate and drain currents of AlGaN/GaN high electron mobility transistors (HEMTs).
Censong Liu +4 more
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A surface-potential-based analytical large-signal model, which is applicable to both ballistic and quasi-ballistic transport in InGaAs high electron mobility transistors, is developed.
Jinye Wang +3 more
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Toolflow for the algorithm-hardware co-design of memristive ANN accelerators
The capabilities of artificial neural networks are rapidly evolving, so are the expectations for them to solve ever more challenging tasks in numerous everyday situations.
Malte Wabnitz, Tobias Gemmeke
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Optimization of Tunnel Field-Effect Transistor-Based ESD Protection Network
The tunnel field-effect transistor (TFET) is a potential candidate for replacing the reverse diode and providing a secondary path in a whole-chip electrostatic discharge (ESD) protection network.
Zhihua Zhu +5 more
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Integrated Circuit Design. [PDF]
Abstract : This report describes the results of a study on the chip design of a low-power filter, using state-of-the-art CMOS technology. The filter is for speech applications and is specified to have 1024 type with programmable weights and linear phase. The chip implementation is to have a word length of 8 to 12 bits and consume a maximum of 2.0 mA at
J. Gringberg, V. S. Wong
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Efficiency Versus Accuracy: A Review of Design Techniques for DNN Hardware Accelerators
Deep neural networks (DNNs) have surpassed other algorithms in analyzing today's abundant data. Due to the security and delay requirements of the given applications, analytical data extraction should happen on edge devices.
Cecilia Latotzke, Tobias Gemmeke
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Microstrip filters are widely used in high-frequency circuit design for signal frequency selection. However, designing these filters often requires extensive trial and error to achieve the desired performance metrics, leading to significant time costs ...
Yunong Ye +5 more
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This paper demonstrates why VCSEL-based transmitter systems are not able to capitalize on higher-order PAM modulation formats (such as PAM-4) to push the link data rate towards 100 Gbit/s with BER of better than 10−5.
Urs Hecht +6 more
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Electrical Modeling and Characterization of Graphene-Based On-Chip Spiral Inductors
This paper investigates the electrical performance of graphene-based on-chip spiral inductors by virtue of a physics-based equivalent circuit model.
Da-Wei Wang +3 more
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TCAD Simulation Study of ESD Behavior of InGaAs/InP Heterojunction Tunnel FETs
For the first time, we investigated the electrostatic discharge (ESD) behavior of an InGaAs/InP heterojunction tunneling field effect transistor (HTFET). The device structure in this study has a high on-state current without extra process steps.
Zhihua Zhu +5 more
doaj +1 more source

