FPGA Implementation for Elliptic Curve Cryptography Algorithm and Circuit with High Efficiency and Low Delay for IoT Applications. [PDF]
Micromachines (Basel), 2023 Wang D, Lin Y, Hu J, Zhang C, Zhong Q.
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A modular technique of Booth encoding and Vedic multiplier for low-area and high-speed applications. [PDF]
Sci Rep, 2023 Kalaiselvi CM, Sabeenian RS.
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High-Efficiency Parallel Cryptographic Accelerator for Real-Time Guaranteeing Dynamic Data Security in Embedded Systems. [PDF]
Micromachines (Basel), 2021 Zhang Z +6 more
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Towards an Efficient CNN Inference Architecture Enabling In-Sensor Processing. [PDF]
Sensors (Basel), 2021 Pantho MJH, Bhowmik P, Bobda C.
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The metaverse digital environments: a scoping review of the challenges, privacy and security issues. [PDF]
Front Big Data, 2023 Tukur M +6 more
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Generalizations of the Karatsuba algorithm for efficient implementations
, 2003 In this work we generalize the classical Karatsuba Algorithm (KA) for polynomial multiplication to (i) polynomials of arbitrary degree and (ii) recursive use.
Christof Paar, André Weimerskirch
core
An efficient multiplier-based FPGA CNN accelerator for Parkinson's disease detection using hand-drawn circle images. [PDF]
Front Artif IntellA V, Sathasivam S, Ramachandran P.
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Efficient computation and design of high speed double precision Vedic multiplier architecture. [PDF]
Sci RepKumar AS +5 more
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A scalable automated framework for multiply-accumulate unit design in high-performance computing applications. [PDF]
Sci RepVenkatachalam A +2 more
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Optimized quantum folding Barrett reduction for quantum modular multipliers. [PDF]
Sci RepZhang J, Cho SM, Lee C, Seo SH.
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