Results 151 to 160 of about 2,741,809 (181)

Efficient Digit-Serial Multiplier Employing Karatsuba Algorithm

2015
This paper presents a efficient digit-serial GF(\( 2^{m} \)) multiplier. The proposed architecture using digit-serial of concept to combine the principle of Karatsuba multiplier which can reduce circuit space complexity, also it is suitable for Elliptic Curve Cryptography (ECC) technology.
Shyan-Ming Yuan, Chiou-Yng Lee, Chia-Chen Fan   +2 more
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Implementing digital filter using karatsuba algorithm with Chebyshev coefficient

2015 International Conference on Communications and Signal Processing (ICCSP), 2015
In this paper, we present a new method that help to improve the performance of a digital Finite Impulse Response filter (FIR) using the methodology of implementing polynomial multiplication in Chebyshev form. Our approach has a two step. First study of Karatsuba algorithm is applied to polynomials constructed by using Chebyshev coefficients.
Vikram S. Deshmukh, Mahesh S. Pawar
openaire   +1 more source

Storage allocation for the Karatsuba integer multiplication algorithm

2005
The Karatsuba (or 3-for-4) integer multiplication algorithm needs some amount of auxiliary memory (in addition to the memory needed to store the result). We give sharp upper and lower bounds for the amount of auxiliary storage required and discuss implementation issues.
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Enhanced high speed modular multiplier using karatsuba algorithm

2013 International Conference on Computer Communication and Informatics, 2013
High speed modular multiplier is a primary requirement of multi-core processors because of critical applications such as security and high performance, many of which requires efficient and reliable hardware implementations. The classical methods are developed using Barrett's reduction and Montgomery multiplications.
C. Prema, C. S. Mainkanda Babu
openaire   +1 more source

Implementation of Single Precision Floating Point Multiplier Using Karatsuba Algorithm

2013 International Conference on Green Computing, Communication and Conservation of Energy (ICGCE), 2013
This paper presents an efficient floating point multiplier using Karatsuba algorithm. Digital signal processing algorithms and media applications use a large number of multiplications, which is both time and power consuming. We have used IEEE 754 format for binary representation of the floating point numbers.
P Jayakrishnan
exaly   +2 more sources

Hardware efficient fast FIR filter based on Karatsuba algorithm

2016 5th International Conference on Modern Circuits and Systems Technologies (MOCAST), 2016
In this work, an efficient implementation of a programmable Finite Impulse Response (FIR) filter based on the use of the Karatsuba Multiplication Algorithm (KMA) is presented. In this FIR filter circuit, a parallel, Modified Booth (MB) pre-encoded, Carry-Save (CS) Wallace tree multiplier is used as a building block. The KMA is a fast divide and conquer
Evangelos Kyritsis, Kiamal Pekmestzi
openaire   +1 more source

Karatsuba Ofman Multiplication implementation on SystemC for Diffie-Hellman Key Exchange algorithm

2017 IEEE 4th International Conference on Knowledge-Based Engineering and Innovation (KBEI), 2017
As technology develops, there becomes the huge needing for cryptologic approaches for data security. Especially for communication between devices/systems, it is needed some protocols to be handled reliably. In today's VLSI systems, it is forecasted to obtain devices with less size, less cost, and less power consumption for future applications.
Aygün, Sercan, Örs Yalçın, Sıddıka Berna, Güneş, Ece Olcay, Kouhalvandi, Lida   +3 more
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Multiplication and Exponentiation of Big Integers With Hybrid Montgomery and Distributed Karatsuba Algorithm

Proceedings. 2004 International Conference on Information and Communication Technologies: From Theory to Applications, 2004., 2004
This paper presents a Montgomery algorithm used for modular reduction with distributed Karatsuba algorithm to achieve the goal. The main objective of this proposal is to reduce the running time and increase the performance of modular reduction. Distributed Karatsuba is proposed to reduce the time of multiplication of two very large digits.
Azman Samsudin
exaly   +2 more sources

Using the parallel Karatsuba algorithm for long integer multiplication and division

1997
We experiment with the sequential and parallel Karatsuba algorithm under the paclib system on a Sequent Symmetry shared memory architecture, obtaining efficiency 88% on 9 processors for the controlled-depth version, and 71% on 18 processors for the scalable version.
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The connection between algorithms of the fast Fourier and Hadamard transformations and the algorithms of Karatsuba, Strassen, and Winograd

USSR Computational Mathematics and Mathematical Physics, 1975
Abstract THE CONNECTION between the algorithms of the fast Fourier and Hadamard transformations and the algorithms of Karatsuba, Strassen, and Winograd is indicated. Recurrence algorithms are given for the rapid computation of dyadic and periodic convolutions.
openaire   +1 more source