Results 141 to 150 of about 439,988 (198)

Leakage power

Proceedings of the 2005 conference on Asia South Pacific design automation - ASP-DAC '05, 2005
Leakage power is emerging as a key challenge in IC design. Leakage is increasingly exponentially with each technology generation and is expected to become the dominant part of total power. Device threshold voltage scaling, shrinking device dimensions, and larger circuit sizes are causing this dramatic increase in leakage.
D. Blaauw, null Anirudh Devgan, null Farid Najm   +2 more
openaire   +1 more source

Leakage power profiling and leakage power reduction using DFT hardware

29th VLSI Test Symposium, 2011
In a CMOS logic circuit, the leakage power dissipated depends on the state of the design. In this paper we propose a novel technique to use the Q-gating logic that are added to reduce power during shift to also reduce leakage power during functional standby mode of the circuit. First, we propose leakage-aware test (λ-test) vector generation that can be
Rajamani Sethuram, Karim Arabi, Mohamed Abu-Rahma   +2 more
openaire   +1 more source

Leakage Power Contributor Modeling

IEEE Design & Test of Computers, 2012
Low-power or power-aware design is one of the greatest challenges facing the semiconductor industry. The fidelity of low power design is dependent on the accuracy of power modeling across a wide range of PVT values. This paper describes an alternative “power contributor”based approach to cell leakage characterization that exploits inherent separability
Nagu Dhanwada, David Hathaway, Jerry Frenkil, W. Rhett Davis, Harun Demircioglu   +4 more
openaire   +1 more source

System-on-chip power management considering leakage power variations

Proceedings of the 44th annual conference on Design automation - DAC '07, 2007
The power characteristics of System-on-chips (SoCs) in nanoscale technologies are significantly impacted by process variations, making it important to consider these effects during system-level power analysis and optimization. In this paper, we identify and address the problem of designing effective power management schemes in the presence of such ...
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan, Sujit Dey   +3 more
openaire   +1 more source

Statistical Analysis of Full-Chip Leakage Power Considering Junction Tunneling Leakage

2007 44th ACM/IEEE Design Automation Conference, 2007
In this paper we address the the growing issue of junction tunneling leakage (Ijunc) at the circuit level. Specifically, we develop a fast approach to analyze the state-dependent total leakage power of a large circuit block, considering Ijunc, sub-threshold leakage (Isub), and gate oxide leakage (Igate).
Tao Li, Zhiping Yu
openaire   +1 more source

Correcting Power Leakage Equation for Improved Leakage Modeling and Detection

Journal of Water Resources Planning and Management, 2020
AbstractFluid pressure influences leakage flow rate in water distribution pipe networks. Significant progress has been made in the use of pressure management techniques to control leakage.
A. M. Kabaasha, J. E. van Zyl, G. “Kumar” Mahinthakumar   +2 more
openaire   +1 more source

Compilers for leakage power reduction

ACM Transactions on Design Automation of Electronic Systems, 2006
Power leakage constitutes an increasing fraction of the total power consumption in modern semiconductor technologies. Recent research efforts indicate that architectures, compilers, and software can be optimized so as to reduce the switching power (also known as dynamic power) in microprocessors.
Yi-Ping You, Chingren Lee, Jenq Kuen Lee
openaire   +1 more source

Leakage power consumption in FPGAs: Thermal analysis

2012 International Symposium on Wireless Communication Systems (ISWCS), 2012
Current power saving techniques have been focused on reducing the dynamic power consumption induced by switching activity in CMOS digital circuits. Among these techniques, we can cite the clock gating, dynamic voltage frequency scaling, adaptive voltage scaling, and multiple voltage thresholds. Recently, as transistors sizes decrease, the leakage power
Nafkha, Amor, Palicot, Jacques, Leray, Pierre, Louët, Yves   +3 more
openaire   +2 more sources

Leakage Power Minimization

2014
This chapter is concerned with leakage power minimization techniques. As leakage power minimization techniques exploit the threshold voltage to minimize leakage power, the dependence of delay and leakage power on threshold voltage is discussed first. Various techniques for the fabrication of multiple threshold voltages are briefly discussed.
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