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Estimation of leakage power using low-power cut technology
2017 International Conference on Innovative Mechanisms for Industry Applications (ICIMIA), 2017Low-power design becomes a challenge for test. In this paper, we propose a novel low-power scan architecture-PowerCut to minimize power consumption during scan test, which is based on a scan chain modification technique. On one hand, a blocking logic is inserted into the scan chain to reduce the dynamic power and a controlling unit is also inserted to ...
D. Vijayalaksmi, P.C. Kishore Raja
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Power balanced circuits for leakage-power-attacks resilient design
2015 Science and Information Conference (SAI), 2015The continuous rise of static power consumption in modern CMOS technologies has led to the creation of a novel class of security attacks on cryptographic systems. The latter exploits the correlation between leakage current and the input patterns to infer the secret key; it is called leakage power analysis (LPA). The use power-balanced (m-of-n) logic is
Halak, Basel +2 more
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2015 Fifth International Conference on Advanced Computing & Communication Technologies, 2015
A 4-input, 3-output priority encoder, implemented in Hardware, often serves as a polling device that permits access to a single (hardware) resource whenever access requests initiated by multiple devices are received at its inputs, either on-chip or Off-chip. In this context, the design of a 4-bit (4-inputs and 3-outputs) FinFET priority encoder module,
Vishwas Mishra, Shyam Akashe
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A 4-input, 3-output priority encoder, implemented in Hardware, often serves as a polling device that permits access to a single (hardware) resource whenever access requests initiated by multiple devices are received at its inputs, either on-chip or Off-chip. In this context, the design of a 4-bit (4-inputs and 3-outputs) FinFET priority encoder module,
Vishwas Mishra, Shyam Akashe
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Leakage Power Characterization Considering Process Variations
2006We present a novel technique to accurately describe the leakage power in CMOS nanometer Integrated Circuits (ICs) considering process variations. The model predicts a leakage power increment due to process variations with high accuracy. It is shown that leakage increases considerably as channel length variations become larger due to technology scaling.
Jose L. Rosselló +3 more
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Leakage detection in power plant boiler
1995The paper deals with the feasibility of using the radiation heat flux measurement as the diagnostic variable for the tube leakage detection system. The mathematical model based on the Monte Carlo zone method is used to investigate sensitivity of the radiative heat flux changes due to the water leakage into the furnace. Control volume based mathematical
Bogdan, Željko +4 more
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Post-synthesis leakage power minimization
2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012M. Rahman, C. Sechen
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Session details: Leakage power optimization
Proceedings of the 41st annual Design Automation Conference, 2004Enrico Macii, Naehyuck Chang, N. Najm
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