Results 141 to 150 of about 611 (160)

Reseeding LFSR for Test Pattern Generation

2019 International Conference on Communication and Signal Processing (ICCSP), 2019
Testing of circuits became difficult as the scale of integration is increasing as said in Moore’s Law. Conventional testing approach is not sufficient with the growth of device counts and density. Testing helps the developer to investigate faults and error present in developed circuit which helps to reduce time require to test and thus decreases ...
Patare Snehal Dilip, Geethu Remadevi Somanathan, Ramesh Bhakthavatchalu   +2 more
openaire   +1 more source

Efficient Unknown Blocking Using LFSR Reseeding

Proceedings of the Design Automation & Test in Europe Conference, 2006
This paper presents an efficient method to block unknown values from entering temporal compactors. The control signals for the blocking logic are generated by an LFSR. The proposed technique minimizes the size of the LFSR by propagating only one fault effect for each fault and balancing the number of specified bits in each control pattern.
null Seongmoon Wang, K.J. Balakrishnan, S.T. Chakradhar   +2 more
openaire   +1 more source

Low Power LFSR for BIST Applications

2018 Second International Conference on Intelligent Computing and Control Systems (ICICCS), 2018
Testing is an inevitable process in safety critical applications such as avionics, space research, etc. In those systems, apart from manufacturing test, which is carried out after the chip is fabricated, maintenance testing also to be done in order to ensure that the device functionality remains the same. Digital circuits that are fabricated these days
G. Sathesh Kumar, V. Saminadan
openaire   +1 more source

Application of LFSR with NTRU Algorithm

2007
The paper deals with stream cipher based on Linear Feedback Shift Registers (LFSR). A scheme is purposed where n-Linear Feedback Shift Registers are used for the encryption and decryption. Both the public key cryptography and the concept of linear feedback shift registers are used in this scheme.
P. R. Suri, Priti Puri
openaire   +1 more source

High-speed generation of LFSR signatures

Proceedings of the Ninth Asian Test Symposium, 2002
We investigate techniques for speeding up the compaction simulation of a single-input signature register based on its equivalent multiple-input implementation. Our approach is to systematically decompose the original input sequence into a set of subsequences based on the theory of finite field.
null Ming-Der Shieh, null Hsin-Fu Lo, null Ming-Hwa Sheu   +2 more
openaire   +1 more source

Word Oriented Cascade Jump σ−LFSR

2009
Bit oriented cascade jump registers were recently proposed as building blocks for stream cipher. They are hardware oriented designed hence inefficient in software. In this paper word oriented cascade jump registers are presented based on the design idea of bit oriented cascade jump registers.
Guang Zeng, Yang Yang, Wenbao Han, Shuqin Fan   +3 more
openaire   +1 more source

Non-linear Combinations of LFSRs

2013
As we have seen in the previous chapter a secure cipher need at least one nonlinear part. The natural way to proceed is to study nonlinear combinations of LFSRs. In this chapter we will meet for the first time the three big attack classes (correlation attacks, algebraic attacks, time-memory trade-off attacks).
openaire   +1 more source

Efficient LFSR Reseeding Technique

This research introduces a novel approach to optimize LFSR reseeding in logic BIST by utilizing a new test pattern generator with the Seed Initialization Method (SIM). Unlike traditional methods which require additional memory for storing seeds this approach eliminates the need for such storage.
openaire   +1 more source

A Secure Steganography Scheme Using LFSR

2019
Steganography is a technique to hide the secret data inside some other cover files (like text, image, audio, etc.) in such a way that it prevents the detection of the secret data within the cover files. In this paper, a new scheme of concealing secret data has been introduced where the locations of hiding the secret bits will be generated by linear ...
Debalina Ghosh, Arup Kumar Chattopadhyay, Koustav Chanda, Amitava Nag   +3 more
openaire   +1 more source

LFSR-Based Generation of Multicycle Tests

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2016
This paper describes a procedure for computing a multicycle test set whose scan-in states are compressed into seeds for a linear-feedback shift register, and whose primary input vectors are held constant during the application of a multicycle test.
openaire   +1 more source