Results 141 to 150 of about 699 (182)

On linear dependencies in subspaces of LFSR-generated sequences

IEEE Transactions on Computers, 1996
Summary: The probability of linear dependency in subsequences generated by linear feedback shift registers is examined. It is shown that this probability for a short subsequence, e.g., a sequence defined by the length of a scan chain, can be much higher than that for an entire \(m\)-sequence.
Janusz Rajski, Jerzy Tyszer
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LFSR-Based Generation of Multicycle Tests

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2016
This paper describes a procedure for computing a multicycle test set whose scan-in states are compressed into seeds for a linear-feedback shift register, and whose primary input vectors are held constant during the application of a multicycle test.
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Parallel computation of LFSR signatures

Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS), 2002
Off-line determination of signatures (both good circuit and faulty circuits) for built-in self-test applications is a compute-intensive process that involves cycle-by-cycle simulation of the signature analyzer. In this paper, we present a parallel algorithm that can speed up the computation of (single input and multiple input) LFSR signatures by almost
B. Narendran, M. Franklin, K.K. Saluja
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A reseeding technique for LFSR-based BIST applications

Proceedings of the 11th Asian Test Symposium, 2002. (ATS '02)., 2003
In this paper, we describe a new design methodology for LFSR-based test pattern generators (TPG). Multiple seeds are produced by the TPG itself to deal with hard-to-detect faults, and this function is achieved without using a ROM to store the seeds.
Nan-Cheng Li, Sying-Jyan Wang
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A Novel SMT-Based Technique for LFSR Reseeding

2012 25th International Conference on VLSI Design, 2012
In order for logic built-in-self-test (LBIST) to achieve coverages comparable with deterministic tests, multiple (and frequently many) seeds are often needed. Unlike previous methods that attempt to chain/compact the number of seeds, we present a novel Satisfiability Modulo Theory (SMT) based technique that can reduce the number of seeds significantly ...
Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram   +3 more
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LFSR reseeding as a component of board level BIST

Proceedings International Test Conference 1996. Test and Design Validity, 2002
In this work we study the feasibility of LFSR reseeding as part of board and system level self test. When LFSR reseeding is included in a BIST strategy two practical aspects of this technique are crucial. These are the data volume of the encoded seeds, and the time it takes to apply LFSR reseeding as part of the self test.
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Test Data Compression with Partial LFSR-Reseeding

14th Asian Test Symposium (ATS'05), 2005
The large amount of test data becomes a serious problem in SOC testing. In this paper, we propose a method to improve the LFSR reseeding based compression scheme. This method rearranges a given set of test data by merging and partitioning test cubes so that they can be decompressed with a fixed-length LFSR.
Yu-Hsuan Fu, Sying-Jyan Wang
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Low Transition LFSR for BIST-Based Applications

14th Asian Test Symposium (ATS'05), 2005
This paper presents a low transition test pattern generator, called LT-LFSR, to reduce average and peak power of a circuit during test by reducing the transitions within randomtest pattern and between consecutive patterns. In other words, transitions are reduced in two dimensions, i.e. between consecutive patterns and bits.
Mohammad Tehranipoor, Mehrdad Nourani, Nisar Ahmed   +2 more
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Non-linear Combinations of LFSRs

2013
As we have seen in the previous chapter a secure cipher need at least one nonlinear part. The natural way to proceed is to study nonlinear combinations of LFSRs. In this chapter we will meet for the first time the three big attack classes (correlation attacks, algebraic attacks, time-memory trade-off attacks).
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Euclid's algorithm and LFSR synthesis

2000 IEEE International Symposium on Information Theory (Cat. No.00CH37060), 2002
We consider two methods of Euclid's algorithm to solve the linear feedback shift register (LFSR) synthesis problem. One of the methods is identically equivalent to the celebrated Berlekamp-Massey (B-M) algorithm. The other method is distinctly Euclidean.
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