Results 271 to 280 of about 381,026 (309)

Optimizing Web Browser on Many-Core Architectures

2011 12th International Conference on Parallel and Distributed Computing, Applications and Technologies, 2011
As more and more Web applications emerging on sever end today, the Web browser on client end has become a host of a variety of applications other than just rendering static Web pages. This leads to more and more performance requirements of a Web browser, for which user experience is very important.
Lingjun Fan, Weisong Shi, Shibin Tang, Chenggang Yan, Dongrui Fan   +4 more
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Computer Architecture in the Many-Core Era

2006 International Conference on Computer Design, 2006
We are rapidly moving into an era when microprocessors (and SoCs) will have 10s of processors on a single die. In this "many-core" era, we are less concerned with the architecture of individual processors and more concerned with how they are tied together.
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A many-core architecture for in-memory data processing

Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017
For many years, the highest energy cost in processing has been data movement rather than computation, and energy is the limiting factor in processor design [21]. As the data needed for a single application grows to exabytes [56], there is clearly an opportunity to design a bandwidth-optimized architecture for big data computation by specializing ...
Sandeep R. Agrawal, Sam Idicula, Arun Raghavan, Evangelos Vlachos, Venkatraman Govindaraju, Venkatanathan Varadarajan, Cagri Balkesen, Georgios Giannikis, Charlie Roth, Nipun Agarwal, Eric Sedlar   +10 more
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Fast Convolution Operations on Many-Core Architectures

2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security, and 2015 IEEE 12th International Conference on Embedded Software and Systems, 2015
Convolution operations have been widely used in many important application domains, such as deep learning and computer vision, in which convolution is always the most time-consuming part. High computational throughput and memory bandwidth make many-core architectures the promising targets to accelerate these applications.
Shigang Li 0002, Yunquan Zhang, Chunyang Xiang, Lei Shi 0001   +3 more
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Explicit Platform Descriptions for Heterogeneous Many-Core Architectures

2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum, 2011
Heterogeneous many-core architectures offer a way to cope with energy consumption limitations of various computing systems from small mobile devices to large data-centers. However, programmers typically must consider a large diversity of architectural information to develop efficient software.
Martin Sandrieser, Siegfried Benkner, Sabri Pllana   +2 more
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Sparse Matrix Multiplication on a Reconfigurable Many-Core Architecture

2015 Euromicro Conference on Digital System Design, 2015
Sparse matrix-vector multiplication (SMVM) is a fundamental operation in many scientific and engineering applications. In many cases sparse matrices have thousands of rows and columns where most of the entries are zero, while non-zero data is spread over the matrix.
João Pinhão, Wilson José, Horácio C. Neto, Mário P. Véstias   +3 more
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Adapting Particle Filter Algorithms to Many-Core Architectures

2013 IEEE 27th International Symposium on Parallel and Distributed Processing, 2013
The particle filter is a Bayesian estimation technique based on Monte Carlo simulation. It is ideal for non-linear, nonGaussian dynamical systems with applications in many areas, such as computer vision, robotics, and econometrics. Practical use has so far been limited, because of steep computational requirements.
Chitchian M., Van Amesfoort A.S., Simonetto A., Keviczky T., Sips H.J.   +4 more
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A Compressive Sensing Algorithm for Many-Core Architectures

2010
This paper describes a parallel algorithm for solving the l1- compressive sensing problem. Its design takes advantage of shared memory, vectorized, parallel and many-core microprocessors such as Graphics Processing Units (GPUs) and standard vectorized multi-core processors (e.g. quad-core CPUs). Experiments are conducted on these architectures, showing
Alexandre Borghi, Jérôme Darbon, Sylvain Peyronnet, Tony F. Chan, Stanley J. Osher   +4 more
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Hybrid Coarrays: a PGAS Feature for Many-Core Architectures

2016
Accelerators such as NVIDIA GPUs and Intel MICs are currently provided as co-processor devices, usable only through a CPU host. For Intel MICs it is planned that this constraint will be lifted in the near future: CPU and accelerator(s) will then form a single, many-core, processor capable of peak performance of several Teraflops with high energy ...
Valeria Cardellini, Alessandro Fanfarillo, Salvatore Filippone, Damian W. I. Rouson   +3 more
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Modelling many-core architectures

2019
Architectural modelling has two primary objectives: (1) navigating the design space exploration, i.e. guiding the architects to arrival at better design choices, and (2) facilitating dynamic management, i.e. providing the functional relationships between workloads'characteristics and architectural configurations to enable appropriate runtime hardware ...
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