Results 241 to 250 of about 1,976,703 (276)

IDAMC: A NoC for mixed criticality systems

2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, 2013
Increasing demand for performance and further integration promotes the use of multi- and many-core systems - also in safety-critical embedded systems. In this domain, hardware platforms obviously have to support real-time, predictability constrained applications such as an anti-lock braking system.
Sebastian Tobuschat, Philip Axer, Rolf Ernst, Jonas Diemer   +3 more
openaire   +2 more sources

Mixed critical system design and analysis

Proceedings of the tenth ACM international conference on Embedded software, 2012
With increasing use of embedded systems in safety critical systems, architectures and design processes for safety have become a primary objective in systems design. Most such systems are also time critical leading to safety and time critical systems.
Rolf Ernst, Alan Burns 0001, Lothar Thiele, Jimmy Le Rhun   +3 more
openaire   +2 more sources

On-chip networks for mixed-criticality systems

2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2016
We propose the integration of a network-on-chip-based MPSoC in mixed-criticality systems, i.e. systems running applications with different criticality levels in terms of completing their execution within predefined time limits. An MPSoC contains tiles that can be either CPUs or memories, and we connect them with an instance of a customizable point-to ...
Polydoros Petrakis, Mohammed Abuteir, Miltos D. Grammatikakis, Kyprianos Papadimitriou, Roman Obermaisser, Zaher Owda, Antonis Papagrigoriou, Michael Soulie, Marcello Coppola   +8 more
openaire   +2 more sources

Temporal partitioning for mixed-criticality systems

ETFA2011, 2011
In embedded systems, such as aerospace crafts and automobiles, it is desirable to run several real-time applications of different criticality on a single computing board by exploiting temporal partitioning. The applications, however, are usually developed by different organizations independently.
Hyun-Wook Jin, Sanghyun Han
openaire   +1 more source

Implementing Mixed Criticality Systems in Ada

2011
Many safety-critical embedded systems are subject to certification requirements. However, only a subset of the functionality of the system may be safety-critical and hence subject to certification; the rest of the functionality is non safety-critical and does not need to be certified, or is certified to a lower level.
Sanjoy K. Baruah, Alan Burns 0001
openaire   +2 more sources

Smart Certification of Mixed Criticality Systems

2005
High integrity applications, such as those performing safety or security critical functions, are usually built to conform to standards such RTCA DO-178B [1] or UK Def Stan 00-55 [2]. Typically such standards define ascending levels of criticality each of which requires a different and increasingly onerous level of verification.
Peter Amey, Roderick Chapman, Neil White
openaire   +2 more sources

Virtualizing Mixed-Criticality Operating Systems

2016 VI Brazilian Symposium on Computing Systems Engineering (SBESC), 2016
The forever growing number of embedded control units in some applications such as cars or airplanes are increasing system complexity and making harder to coordinate all this hardware. The increasing capacity of embedded hardware and the advances in virtualization technology make it possible to deal with this problem.
Rodrigo Schmitt Meurer, Mateus Krepsky Ludwich, Antônio Augusto Fröhlich   +2 more
openaire   +1 more source

Scheduling of mixed-criticality systems with RUN

2015 IEEE 20th Conference on Emerging Technologies & Factory Automation (ETFA), 2015
Mixed-criticality systems emerged with the aim of reconciling safety requirements and efficient use of multi-processor or uniprocessor platforms. On multi-processors, recent works on mixed-criticality have produced impressive results in terms of speed-up factor. But these solutions, based on Pfair-like scheduling algorithms, entail too many preemptions
Romain Gratia, Thomas Robert 0003, Laurent Pautet   +2 more
openaire   +2 more sources

On the Scheduling of Fault-Tolerant Mixed-Criticality Systems

Proceedings of the 51st Annual Design Automation Conference, 2014
We consider in this paper fault-tolerant mixed-criticality scheduling, where heterogeneous safety guarantees must be provided to functionalities (tasks) of varying criticalities (importances). We model explicitly the safety requirements for tasks of different criticalities according to safety standards, assuming hardware transient faults.
Pengcheng Huang 0001, Hoeseok Yang, Lothar Thiele   +2 more
openaire   +1 more source

Mixed-criticality scheduling with memory bandwidth regulation

2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018
Mixed-criticality (MC) multicore system design must reconcile safety guarantees and high performance. The interference among cores on shared resources in such systems leads to unpredictable temporal behaviour. Memory bandwidth regulation among different cores can be a useful tool to mitigate the interference when accessing main memory.
Muhammad Ali Awan, Pedro F. Souto, Konstantinos Bletsas 0001, Benny Akesson, Eduardo Tovar   +4 more
openaire   +3 more sources